AD9613 datasheet(12/36 Pages) AD

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AD9613

Data Sheet

Rev. C | Page 12 of 36

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

CLK+

CLK–

SYNC

DNC

DRVDD

DNC

D0– (LSB)

D0+ (LSB)

D1–

D1+

NOTES

1. DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN.

2. THE EXPOSED THERMAL PADDLE ON THE BOTTOM OF THE PACKAGE

PROVIDES THE ANALOG GROUND FOR THE PART. THIS EXPOSED PADDLE

MUST BE CONNECTED TO GROUND FOR PROPER OPERATION.

PDWN

OEB

CSB

SCLK

SDIO

OR+

OR–

D11+ (MSB)

D11– (MSB)

D10+

D10–

DRVDD

D9+

D9–

D8+

D8–

AD9613

PARALLEL LVDS

TOP VIEW

(Not to Scale)

PIN 1

INDICATOR

Figure 4. Pin Configuration (Top View) for the LFCSP Interleaved Parallel LVDS Mode

Table 8. Pin Function Descriptions for the LFCSP Interleaved Parallel LVDS Mode

Pin No.

Mnemonic

Type

Description

ADC Power Supplies

AGND,

Exposed Paddle

Ground

Analog Ground. The exposed thermal paddle on the bottom of the

package provides the analog ground for the part. This exposed paddle

must be connected to ground for proper operation.

4 to 9, 11, 12, 55, 56, 58

DNC

Do not connect. Do not connect to these pins.

10, 19, 28, 37

DRVDD

Supply

Digital Output Driver Supply (1.8 V Nominal).

49, 50, 53, 54, 59, 60, 63, 64

AVDD

Supply

Analog Power Supply (1.8 V Nominal).

ADC Analog

CLK+

Input

ADC Clock Input—True.

CLK−

Input

ADC Clock Input—Complement.

VIN+A

Input

Differential Analog Input Pin (+) for Channel A.

VIN−A

Input

Differential Analog Input Pin (−) for Channel A.

VCM

Output

Common-Mode Level Bias Output for Analog Inputs. This pin should

be decoupled to ground using a 0.1 μF capacitor.

VIN−B

Input

Differential Analog Input Pin (−) for Channel B.

VIN+B

Input

Differential Analog Input Pin (+) for Channel B.

Digital Input

SYNC

Input

Digital Synchronization Pin. Slave mode only.

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