AD9613 datasheet(15/36 Pages) AD

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Data Sheet

AD9613

Rev. C | Page 15 of 36

Pin No.

Mnemonic

Type

Description

B D0−/D1− (LSB)

Output

Channel B LVDS Output Data 1/Data 0—Complement.

B D0+/D1+ (LSB)

Output

Channel B LVDS Output Data 1/Data 0—True.

B D2−/D3−

Output

Channel B LVDS Output Data 3/Data 2—Complement.

B D2+/D3+

Output

Channel B LVDS Output Data 3/Data 2—True.

B D4−/D5−

Output

Channel B LVDS Output Data 5/Data 4—Complement.

B D4+/D5+

Output

Channel B LVDS Output Data 5/Data 4—True.

B D6−/D7−

Output

Channel B LVDS Output Data 7/Data 6—Complement.

B D6+/D7+

Output

Channel B LVDS Output Data 7/Data 6—True.

B D8−/D9−

Output

Channel B LVDS Output Data 9/Data 8—Complement.

B D8+/D9+

Output

Channel B LVDS Output Data 9/Data 8—True.

B D10−/D11−

Output

Channel B LVDS Output Data 11/Data 10—Complement.

B D10+/D11+

Output

Channel B LVDS Output Data 11/Data 10—True.

A D0−/D1− (LSB)

Output

Channel A LVDS Output Data 1/Data 0—Complement.

A D0+/D1+ (LSB)

Output

Channel A LVDS Output Data 1/Data 0—True.

A D2−/D3−

Output

Channel A LVDS Output Data 3/Data 2—Complement.

A D2+/D3+

Output

Channel A LVDS Output Data 3/Data 2—True.

A D4−/D5−

Output

Channel A LVDS Output Data 5/Data 4—Complement.

A D4+/D5+

Output

Channel A LVDS Output Data 5/Data 4—True.

A D6−/D7−

Output

Channel A LVDS Output Data 7/Data 6—Complement.

A D6+/D7+

Output

Channel A LVDS Output Data 7/Data 6—True.

A D8−/D9−

Output

Channel A LVDS Output Data 9/Data 8—Complement.

A D8+/D9+

Output

Channel A LVDS Output Data 9/Data 8—True.

A D10−/D11−

Output

Channel A LVDS Output Data 11/Data 10—Complement.

A D10+/D11+

Output

Channel A LVDS Output Data 11/Data 10—True.

ORA+

Output

Channel A LVDS Overrange Output—True. The overrange indication is

valid on the rising edge of the DCO.

ORA−

Output

Channel A LVDS Overrange Output—Complement. The overrange

indication is valid on the rising edge of the DCO.

DCO+

Output

Channel A/Channel B LVDS Data Clock Output—True.

DCO−

Output

Channel A/Channel B LVDS Data Clock Output—Complement.

SPI Control

SCLK

Input

SPI Serial Clock.

SDIO

Input/Output

SPI Serial Data I/O.

CSB

Input

SPI Chip Select (Active Low).

Output Enable Bar and

Power-Down

OEB

Input

Output Enable Bar Input (Active Low).

PDWN

Input

Power-Down Input (Active High). Operation depends upon SPI mode;

this input can be configured as power-down or standby. For further

description, refer to Table 14.

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