MAX1889 datasheet(22/32 Pages) MAXIM

22 / 32 page

Triple-Output TFT LCD Power Supply

with Fault Protection

______________________________________________________________________________________

The transistor’s current gain limits the guaranteed maxi-

mum output current to:

where IDRV is the minimum base-drive current, and RBE

is the pullup resistor connected between the transis-

tor’s base and emitter. Furthermore, the transistor’s cur-

rent gain increases the linear regulator’s DC loop gain

(see the Stability Requirements section), so excessive

gain destabilizes the output. Therefore, transistors with

current gain over 100 at the maximum output current

are not recommended. The transistor’s input capaci-

tance and input resistance also create a second pole,

which could be low enough to make the output unsta-

ble when heavily loaded.

The transistor’s saturation voltage at the maximum output

current determines the minimum input-to-output voltage

differential that the linear regulator supports.

Alternatively, the package’s power dissipation could limit

the usable maximum input-to-output voltage differential.

The maximum power dissipation capability of the transis-

tor’s package and mounting must exceed the actual

power dissipation in the device. The power dissipation

equals the maximum load current times the maximum

input-to-output voltage differential:

During startup, the LDO outputs are below their respec-

tive setpoints, and the base drive to the pass transis-

tors is a maximum. The large drive currents can cause

the charge-pump outputs to collapse. If the charge-

pump loading is objectionable, base resistors can be

added between the drive outputs (DRVN and DRVP)

and the pass transistors (Figure 7). These resistors limit

the maximum drive current and prevent discharging the

charge pump’s output capacitors. Select the minimum

base drive current to meet the maximum required LDO

output current:

The resistance required to guarantee this base current is:

As a consequence of adding the base resistors, a volt-

age change at DRVN and DRVP accompanies changes

in drive current. This voltage change can be coupled

through parasitic capacitance to the LDO feedback

pins. If the rate of voltage change is sufficiently large, it

can cause instability.

BASE

LDOIN MAX

DRIVE MIN

MIN

LDOIN MAX

LDOOUT MAX

≤

()

DRIVE MIN

LDOOUT MAX

MIN

()

LOAD MAX

LDOIN

LDOOUT

LOAD MAX

()

LOAD MAX

DRV

MIN

() =









DRVP

FBP

DRVN

FBN

VPL

REF

R20

51k

Ω

R19

15k

Ω

C24

2200pF

C20

470pF

VNL

MAX1889

Figure 7. Limiting LDO Drive Current During Startup

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