MAX1889 datasheet(25/32 Pages) MAXIM

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Additional Application Circuits

Operation with Output Voltage >13V

The maximum output voltage of the step-up regulator is

13V, which is limited by the absolute maximum rating of

the internal power MOSFET. To achieve higher output

voltage, an external N-channel MOSFET can be cas-

coded with the internal FET (Figure 9). Since the gate of

the external FET is biased from the input supply, use a

logic-level FET to ensure that the FET is fully enhanced

at the minimum input voltage. The current rating of the

FET needs to be higher than the internal current limit.

Changing Power-Up Sequence

The power-up sequencing of the linear regulators can be

controlled using external delays. Figure 10 shows an

application where the negative linear-regulator output

powers up with a certain delay after the positive linear

regulator reaches regulation. The resistors R1, R2, and

the capacitor C form an RC network that provides the

power-up delay. The time constant of this RC network is:

Select the ratio of R1 and R2 so that:

or:

With this R1/R2 ratio, the power-up delay can be calcu-

lated as:

where VD is the forward voltage drop of the diode and

0.125V is the FBN regulation point.

As a design example, assume the positive linear-regu-

lator output VPL is +20V, the negative charge-pump

output VN is -9V, and the required power-up delay time

tD is 4ms:

The ratio of R1 and R2 should be:

The required RC time constant is:

Choose C = 0.1µF, then R1//R2 = 16.8k

Ω. Use stan-

dard resistor values: R1 = 56k

Ω and R2 = 24kΩ.

Disabling Input MOSFET Switch

If the input protection MOSFET is not needed, disable

the input overcurrent comparator by connecting the

OCP pin to ground, the OCN pin to VIN. Leave the

GATE pin floating (Figure 11).

Generating Gamma Reference Voltage

The reference voltage for the Gamma correction resis-

tor string can be produced using the linear-regulator

controller. If the voltage difference between the main

boost voltage (VMAIN) and the Gamma reference volt-

age is 400mV or greater, the emitter of the PNP pass

transistor should be connected to VMAIN.

τ=













20 9

07 0125

168

ττ













0 125

= -

NPL

τ=

Triple-Output TFT LCD Power Supply

with Fault Protection

______________________________________________________________________________________

STEP-UP

REGULATOR

PGND

MAX1889

VMAIN

15V

VIN

Figure 9. Operation with Output Voltage >13V Using Cascoded

MOSFET

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