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LTC1871 Datasheet(PDF) 22 Page - Linear Technology |
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LTC1871 Datasheet(HTML) 22 Page - Linear Technology |
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22 / 36 page ![]() 22 LTC1871 APPLICATIO S I FOR ATIO immediately adjacent to Pin 6. The ground trace on the top layer of the PC board should be as wide and short as possible to minimize series resistance and induc- tance. 2. Beware of ground loops in multiple layer PC boards. Try to maintain one central ground node on the board and use the input capacitor to avoid excess input ripple for high output current power supplies. If the ground plane LTC1871 M1 VIN 1871 F14 VOUT SWITCH NODE IS ALSO THE HEAT SPREADER FOR L1, M1, D1 L1 RT RC CC R3 J1 CIN COUT CVCC R1 R2 PSEUDO-KELVIN SIGNAL GROUND CONNECTION TRUE REMOTE OUTPUT SENSING VIAS TO GROUND PLANE R4 PIN 1 COUT BULK C LOW ESR CERAMIC JUMPER D1 Figure 14. LTC1871 Boost Converter Suggested Layout RUN ITH FB FREQ MODE/ SYNC SENSE VIN INTVCC GATE GND LTC1871 + R4 J1 10 9 8 7 6 1 2 3 4 5 CVCC PSEUDO-KELVIN GROUND CONNECTION CIN M1 D1 L1 VIN GND 1871 F15 VOUT SWITCH NODE COUT RC R1 RT BOLD LINES INDICATE HIGH CURRENT PATHS R2 CC R3 Figure 15. LTC1871 Boost Converter Layout Diagram |
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