AD1836AS datasheet(15/18 Pages) AD

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PRELIMINARY TECHNICAL DATA

REV. PrC

AD1836

–15–

SPI CONTROL REGISTERS

Note: All control registers default to zero at power-up.

Serial SPI Word Format

Read/Write

Reserved

Data Field

15..12

9..0

4 Bits

1 = Read

10 Bits

0 = Write

RD/WR

RSVD

Function

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

(Bits 9:0)

DAC Control 1

DAC Control 2

DAC Volume 0

DAC Volume 1

DAC Volume 2

DAC Volume 3

DAC Volume 4

DAC Volume 5

ADC 0 – Peak Level (Read Only)

ADC 1 – Peak Level (Read Only)

ADC 2 – Peak Level (Read Only)

ADC 3 – Peak Level (Read Only)

ADC Control 1

ADC Control 2

ADC Control 3

Reserved

DAC Control Register 1

Function

Data Word

Power-Down

Interpolator

Address

RD/WR RSVD

De-Emphasis Serial Mode

Width

Reset

Mode

Reserved

15, 14, 13, 12 11

9, 8

7, 6, 5

4, 3

0000

00 = None

000 = I

00 = 24-Bits

0 = Normal

0 = 8

× (48 kHz) 0

01 = 44.1 kHz

001 = RJ

01 = 20 Bits

1 = PWRDWN 1 = 4

× (96 kHz)

10 = 32.0 kHz

010 = DSP

10 = 16 Bits

11 = 48.0 kHz

011 = LJ

11 = Reserved

100 = Pack Mode 256

101 = Pack Mode 128

110 = Reserved

111 = Reserved

NOTES

Packed Mode: Four channels are “packed” into DSDATA1 serial input.

Packed Mode 128: Refer Figure 6.

Packed Mode 256: Refer to Figure 7.

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