C8051F011 datasheet(13/170 Pages) ETC

13 / 170 page

4.2001; Rev. 1.3

CYGNAL Integrated Products, Inc.

 2001

Page 13

C8051F000/1/2/5/6/7

C8051F010/1/2/5/6/7

PRELIMINARY

1.1.3.

Additional Features

The C8051F000 MCU family has several key enhancements both inside and outside the CIP-51 core to improve its

overall performance and ease of use in the end applications.

The extended interrupt handler provides 21 interrupt sources into the CIP-51 (as opposed to 7 for the standard 8051),

allowing the numerous analog and digital peripherals to interrupt the controller. An interrupt driven system requires

less intervention by the MCU, giving it more effective throughput. The extra interrupt sources are very useful when

building multi-tasking, real-time systems.

There are up to seven reset sources for the MCU: an on-board VDD monitor, a Watchdog Timer, a missing clock

detector, a voltage level detection from Comparator 0, a forced software reset, the CNVSTR pin, and the /RST pin.

The /RST pin is bi-directional, accommodating an external reset, or allowing the internally generated POR to be

output on the /RST pin. Each reset source except for the VDD monitor and Reset Input Pin may be disabled by the

user in software. The WDT may be permanently enabled in software after a power-on reset during MCU

initialization.

The MCU has an internal, stand alone clock generator which is used by default as the system clock after any reset. If

desired, the clock source may be switched on the fly to the external oscillator, which can use a crystal, ceramic

resonator, capacitor, RC, or external clock source to generate the system clock. This can be extremely useful in low

power applications, allowing the MCU to run from a slow (power saving) external crystal source, while periodically

switching to the fast (up to 16MHz) internal oscillator as needed.

Figure 1.5. On-Board Clock and Reset

WDT

XTAL1

XTAL2

OSC

Internal

Clock

Generator

System

Clock

CIP-51

Microcontroller

Core

Missing

Clock

Detector

(one-

shot)

Software Reset

Extended Interrupt

Handler

Clock Select

/RST

VDD

Supply

Reset

Timeout

(wired-OR)

System Reset

Supply

Monitor

PRE

Reset

Funnel

CP0+

Comparator 0

CP0-

(Port

I/O)

Crossbar

CNVSTR

(CNVSTR

reset

enable)

(CP0

reset

enable)

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