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MB9D560 Datasheet(PDF) 1 Page - Cypress Semiconductor |
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MB9D560 Datasheet(HTML) 1 Page - Cypress Semiconductor |
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1 / 91 page ![]() MB9D560 Series 32-bit Microcontroller Traveo TM Family Cypress Semiconductor Corporation • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 002-05679 Rev.*A Revised March 22, 2016 MB9D560 series has Cypress 32-bit microcontrollers for automobile motor control. They use the ARM ® Cortex-R5 MPCoreTM CPU that is compatible with the ARM family. Notes: • ARM, Cortex, Thumb are the registered trademarks of ARM Limited in the EU and other countries. • MPCore, CoreSight are the trademarks of ARM Limited in the EU and other countries. Features Technology CMOS 90nm technology CPU ARM Cortex®-R5F 32-bit ARM architecture 2-instruction issuance super scalar 8-stage pipeline ARMv7 / Thumb®-2 instruction set Floating-Point Unit (FPU) Double precision Memory protection Unit (MPU) 16 area ECC support for the TCM port 1-bit error correction, 2-bit error detection ECC (SEC-DED) TCM port 2 TCM ports ATCM port BTCM 2 ports (B0TCM, B1TCM) VIC port Low latency interrupt AXI master interface 64-bit AXI interface (instruction / data access) 32-bit AXI interface (I/O access) AXI slave interface 64-bit AXI interface (accessible to TCM port) CPU configuration 2 CPUs (AMP operation) Operating frequency Maximum 200 MHz Trace with ETM-R5 Debugging ARM CoreSightTM Technology Each CPU embedded Embedded Trace Macro (ETM), trace support of CPU operation Debugging interface JTAG (5 pin ) Support clock : maximum 20 MHz Debugging security support 128-bit security key (Device security key) Wakeup function on JTAG Operation mode User mode Normal mode (internal memory activation) Serial writer mode Clock control Internal clock source Fast-CR oscillation (8 MHz) Slow-CR oscillation (100 kHz) External oscillation input Main clock input Embedded PLL Main PLL (Multiplying clock of main oscillation ) Oscillator stabilized timer Support oscillator stabilized timer for all clock source independently After a lapse of oscillator stabilized time, it is able to use source clock timer (Except PLL for FlexRay/RDC) |
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