M59PW1282 datasheet(8/24 Pages) STMICROELECTRONICS

8 / 24 page

M59PW1282

8/24

BUS OPERATIONS

There are six standard bus operations that control

the device. These are Bus Read, Bus Write, Out-

put Disable, Standby, Automatic Standby and

Electronic Signature. See Tables 3, Bus Opera-

tions, for a summary. Typically glitches of less

than 5ns on Chip Enable or Write Enable are ig-

nored by the memory and do not affect bus opera-

tions.

Bus Read. Bus Read operations read from the

memory cells, or specific registers in the Com-

mand Interface. A valid Bus Read operation in-

volves setting the desired address on the Address

Inputs and applying a Low signal, VIL, to Chip En-

able and Output Enable. The Data Inputs/Outputs

will output the value, see Figure 12, Read AC

Waveforms, and Table 12, Read AC Characteris-

tics, for details of when the output becomes valid.

During read array operations A22 selects Top

(A22 = VIH) or Bottom (A22 = VIL) die.

Bus Write. Bus Write operations write to the

Command Interface. Bus Write is enabled only

when VPP is set to VHH. A valid Bus Write opera-

tion begins by setting the desired address on the

Address Inputs. The Address Inputs are latched by

the Command Interface on the falling edge of Chip

Enable. The Data Inputs/Outputs are latched by

the Command Interface on the rising edge of Chip

Enable. Output Enable must remain High, VIH,

during the whole Bus Write operation. See Figure

12, Write AC Waveforms, and Table 14, Write AC

Characteristics, for details of the timing require-

ments.

Output Disable. The Data Inputs/Outputs are in

the high impedance state when Output Enable is

High, VIH.

Standby. When Chip Enable is High, VIH, the

memory enters Standby mode and the Data In-

puts/Outputs pins are placed in the high-imped-

ance state. To reduce the Supply Current to the

Standby Supply Current, ICC2, Chip Enable should

be held within VCC ± 0.2V. For the Standby current

level see Table 12, DC Characteristics.

During program operation the memory will contin-

ue to use the Program Supply Current, ICC3, for

Program operation until the operation completes.

Automatic Standby. If CMOS levels (VCC ± 0.2V)

are used to drive the bus and the bus is inactive for

150ns or more the memory enters Automatic

Standby where the internal Supply Current is re-

duced to the Standby Supply Current, ICC2. The

Data Inputs/Outputs will still output data if a Bus

Read operation is in progress.

Electronic Signature. The

memory

has

two

codes, the manufacturer code and the device

code, that can be read to identify the memory.

These codes can be read by applying the signals

listed in Tables 3, Bus Operations, once the Auto

Select Command is executed. To exit Electronic

Signature mode, the Read/Reset command must

be issued.

Table 3. Bus Operations

Note: 1. X = VIL or VIH.

2. When reading the Status Register during a program operation A22/VPP must be kept at VHH.

3. VIL enables the Bottom die, VIH enables the Top die during read array operation.

4. VHH after latching A22 at VIL or VIH.

Operation

A22/VPP

(2)

Address Inputs

A0-A21

Data Inputs/Outputs

DQ15-DQ0

Bus Read

VIL

VIL/VIH

(3)

Cell Address

Data Output

Bus Write

VIL

VIH

VHH

(4)

Command Address

Data Input

Output Disable

VIH

Hi-Z

Standby

VIH

Hi-Z

Read Manufacturer

Code

VIL

VHH

A0 = VIL, A1 = VIL,

Others VIL or VIH

0020h

Read Device Code

VIL

VHH

A0 = VIH, A1 = VIL,

Others VIL or VIH

88AAh

M59PW1282 Datasheet(PDF) 8 Page - STMicroelectronics

M59PW1282 Datasheet(HTML) 8 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

Datasheet Download

Link URL