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PC33889 Datasheet(PDF) 7 Page - Motorola, Inc |
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PC33889 Datasheet(HTML) 7 Page - Motorola, Inc |
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7 / 30 page ![]() PC33889 7 PC33889 Figure 2. Timing Characteristics Delay between SPI and “CAN normal mode” Ts-CANn 10 us SBC Normal mode guaranteed by design Delay between SPI and “CAN sleep mode” Ts-CANs 10 us SBC Normal mode guaranteed by design Delay between CSB wake up (CSB low to high) and SBC normal request mode (Vdd1 on & reset high) Tw-csb 15 40 90 us SBC in stop mode Delay between CSB wake up (CSB low to high) and first accepted SPI command Tw-spi 90 N/A us SBC in stop mode Delay between INT pulse and 1st SPI command accepted Ts-1stspi 20 N/A us In stop mode after wake up D0 D0 Undefined Don’t Care D8 Don’t Care Tlead Tsih Tsisu Tlag Tpclk Twclkh Twclkl Tvalid Don’t Care D8 Tsodis CSB SCLK MOSI MISO Tsoen Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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