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ADCS7477 Datasheet(PDF) 19 Page - Texas Instruments

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Part # ADCS7477
Description  8-Bit A/D Converters
PDF  33 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

ADCS7477 Datasheet(HTML) 19 Page - Texas Instruments

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ADCS7476, ADCS7477, ADCS7478
www.ti.com
SNAS192G – APRIL 2003 – REVISED MAY 2016
Product Folder Links: ADCS7476 ADCS7477 ADCS7478
Submit Documentation Feedback
Copyright © 2003–2016, Texas Instruments Incorporated
Device Functional Modes (continued)
7.4.3 Modes of Operation
The ADCS747x has two possible modes of operation: Normal Mode and Shutdown Mode. ADCS747x enters
normal mode (and a conversion process is begun) when CS is pulled low. The device enters shutdown mode if
CS is pulled high before the tenth falling edge of SCLK after CS is pulled low, or stays in normal mode if CS
remains low. Once in shutdown mode, the device stays there until CS is brought low again. By varying the ratio
of time spent in the normal and shutdown modes, a system may trade off throughput for power consumption.
7.4.3.1 Normal Mode
The best possible throughput is obtained by leaving the ADCS747x in normal mode at all times, so there are no
power-up delays. To keep the device in normal mode continuously, CS must be kept low until after the 10th
falling edge of SCLK after the start of a conversion (remember that a conversion is initiated by bringing CS low).
If CS is brought high after the 10th falling edge, but before the 16th falling edge, the device remains in normal
mode, but the current conversion is aborted, and SDATA returns to TRI-STATE (truncating the output word).
Sixteen SCLK cycles are required to read all of a conversion word from the device. After sixteen SCLK cycles
have elapsed, CS may be idled either high or low until the next conversion. If CS is idled low, it must be brought
high again before the start of the next conversion, which begins when CS is again brought low.
After sixteen SCLK cycles, SDATA returns to TRI-STATE. Another conversion may be started, after tQUIET has
elapsed, by bringing CS low again.
7.4.3.2 Start-Up Mode
When the VDD supply is first applied, the ADCS747x may power up in either of the two modes: normal or
shutdown. As such, one dummy conversion should be performed after start-up, exactly as described in Power-
Up Timing. The part may then be placed into either normal mode or the shutdown mode, as described in Normal
Mode and Shutdown Mode.
7.4.3.3 Shutdown Mode
Shutdown mode is appropriate for applications that either do not sample continuously, or are willing to trade
throughput for power consumption. When the ADCS747x is in shutdown mode, all of the analog circuitry is
turned off.
To enter shutdown mode, a conversion must be interrupted by bringing CS back high anytime between the
second and tenth falling edges of SCLK, as shown in Figure 29. Once CS has been brought high in this manner,
the device enters shutdown mode; the current conversion is aborted and SDATA enters TRI-STATE. If CS is
brought high before the second falling edge of SCLK, the device does not change mode; this is to avoid
accidentally changing mode as a result of noise on the CS line.
Figure 29. Entering Shutdown Mode



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