DM385 datasheet(223/281 Pages) TI1

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Recommended DDR2 Device

Orientation

OFFSET

DM385, DM388

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SPRS821D – MARCH 2013 – REVISED DECEMBER 2013

8.13.2.2.4 Placement

Figure 8-50 shows the required placement for the processor as well as the DDR2 devices. The

dimensions for this figure are defined in Table 8-51. The placement does not restrict the side of the PCB

on which the devices are mounted. The ultimate purpose of the placement is to limit the maximum trace

lengths and allow for proper routing space. For a 16-bit DDR memory system, the high-word DDR2 device

is omitted from the placement.

Figure 8-50. Device and DDR2 Device Placement

Table 8-51. Placement Specifications

NO.

PARAMETER

MIN

MAX

UNIT

X + Y(1)(2)

1660

Mils

X'(1)(2)

1280

Mils

X' Offset(1)(2) (3)

650

Mils

DDR2 keepout region(4)

Clearance from non-DDR2 signal to DDR2 keepout region(5)

(1)

For dimension definitions, see Figure 8-48.

(2)

Measurements from center of processor to center of DDR2 device.

(3)

For 16-bit memory systems, it is recommended that X' offset be as small as possible.

(4)

DDR2 keepout region to encompass entire DDR2 routing area.

(5)

Non-DDR2 signals allowed within DDR2 keepout region provided they are separated from DDR2 routing layers by a ground plane.

Peripheral Information and Timings

223

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