AD7908/AD7918/AD7928

REV. A

PIN FUNCTION DESCRIPTIONS

Pin No.

Mnemonic

Function

1

SCLK

Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock

input is also used as the clock source for the AD7908/AD7918/AD7928’s conversion process.

2DIN

Data In. Logic input. Data to be written to the AD7908/AD7918/AD7928’s Control Register is provided on

this input and is clocked into the register on the falling edge of SCLK (see the Control Register section).

3

CS

Chip Select. Active low logic input. This input provides the dual function of initiating conversions on

the AD7908/AD7918/AD7928, and also frames the serial data transfer.

4, 8, 17, 20

AGND

Analog Ground. Ground reference point for all analog circuitry on the AD7908/AD7918/AD7928.

All analog input signals and any external reference signal should be referred to this AGND voltage.

All AGND pins should be connected together.

5, 6

For the 0 V to 2

7

Reference Input for the AD7908/AD7918/AD7928. An external reference must be applied to this input.

The voltage range for the external reference is 2.5 V ± 1% for specified performance.

into the on-chip track-and-hold. The analog input channel to be converted is selected by using the

address bits ADD2 through ADD0 of the Control Register. The address bits, in conjunction with the SEQ

and SHADOW bits, allow the Sequencer to be programmed. The input range for all input channels

Register. Any unused input channels must be connected to AGND to avoid noise pickup.

18

DOUT

Data Out. Logic output. The conversion result from the AD7908/AD7918/AD7928 is provided on

this output as a serial data stream. The bits are clocked out on the falling edge of the SCLK input. The

data stream from the AD7908 consists of one leading zero, three address bits indicating which channel

the conversion result corresponds to, followed by the eight bits of conversion data, followed by four

trailing zeros, provided MSB first; the data stream from the AD7918 consists of one leading zero,

three address bits indicating which channel the conversion result corresponds to, followed by the 10 bits

of conversion data, followed by two trailing zeros, also provided MSB first; the data stream from the

AD7928 consists of one leading zero, three address bits indicating which channel the conversion result

corresponds to, followed by the 12 bits of conversion data, provided MSB first. The output coding

may be selected as straight binary or twos complement via the CODING bit in the Control Register.

19

Logic Power Supply Input. The voltage supplied at this pin determines at what voltage the serial

interface of the AD7908/AD7918/AD7928 will operate.

PIN CONFIGURATION

20-Lead TSSOP

1

AD7908/

AD7918/

AD7928

SCLK

AGND

20

TOP VIEW

(Not to Scale)

2

DIN

19

3

CS

DOUT

18

4

AGND

AGND

17

5

16

6

15

7

14

8

AGND

13

9

12

10

11

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