AD7908 datasheet(17/24 Pages) AD

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AD7908/AD7918/AD7928

REV. A

When no amplifier is used to drive the analog input, the source

impedance should be limited to low values. The maximum source

impedance will depend on the amount of total harmonic distortion

(THD) that can be tolerated. The THD will increase as the source

impedance increases, and performance will degrade. (See TPC 5.)

VIN

4pF

30pF

AVDD

CONVERSION PHASE: SWITCH OPEN

TRACK PHASE: SWITCH CLOSED

Figure 7. Equivalent Analog Input Circuit

ADC TRANSFER FUNCTION

The output coding of the AD7908/AD7918/AD7928 is either

straight binary or twos complement, depending on the status of

the LSB in the Control Register. The designed code transitions

occur at successive LSB values (i.e., 1 LSB, 2 LSBs, and so on).

The LSB size is REFIN/256 for the AD7908, REFIN/1024 for the

AD7918, and REFIN/4096 for the AD7928. The ideal transfer

characteristic for the AD7908/AD7918/AD7928 when straight

binary coding is selected is shown in Figure 8, and the ideal

transfer characteristic for the AD7908/AD7918/AD7928 when

twos complement coding is selected is shown in Figure 9.

000…000

ANALOG INPUT

111…111

000…001

000…010

111…110

•

111…000

•

011…111

•

1 LSB

+VREF

1 LSB

1LSB

VREF/256 AD7908

1LSB

VREF/1024 AD7918

1LSB

VREF/4096 AD7928

NOTE: V REF IS EITHER REFIN OR 2

REFIN

Figure 8. Straight Binary Transfer Characteristic

–VREF

1 LSB

ANALOG INPUT

+VREF

1 LSB

1LSB

VREF 256 AD7908

1LSB

VREF 1024 AD7918

1LSB

VREF 4096 AD7928

VREF

1LSB

100…000

011…111

100…001

100…010

011…110

•

000…001

111…111

•

000…000

Figure 9. Twos Complement Transfer Characteristic with

REFIN ± REFIN Input Range

Handling Bipolar Input Signals

Figure 10 shows how useful the combination of the 2

REFIN

input range and the twos complement output coding scheme is

for handling bipolar input signals. If the bipolar input signal is

biased about REFIN and twos complement output coding is

selected, then REFIN becomes the zero code point, –REFIN is

negative full scale and +REFIN becomes positive full scale, with

a dynamic range of 2

REFIN.

TYPICAL CONNECTION DIAGRAM

Figure 11 shows a typical connection diagram for the AD7908/

AD7918/AD7928. In this setup, the AGND pin is connected to

the analog ground plane of the system. In Figure 11, REFIN is

connected to a decoupled 2.5 V supply from a reference source,

the AD780, to provide an analog input range of 0 V to 2.5 V

(if RANGE bit is 1) or 0 V to 5 V (if RANGE bit is 0). Although

the AD7908/AD7918/AD7928 is connected to a VDD of 5 V, the

serial interface is connected to a 3 V microprocessor. The VDRIVE

pin of the AD7908/AD7918/AD7928 is connected to the same 3 V

supply of the microprocessor to allow a 3 V logic interface (see

the Digital Inputs section). The conversion result is output in a

16-bit word. This 16-bit data stream consists of a leading zero,

three address bits indicating which channel the conversion result

corresponds to, followed by the 12 bits of conversion data for

the AD7928 (10 bits of data for the AD7918 and 8 bits of data for

the AD7908, each followed by two and four trailing zeros, respec-

tively). For applications where power consumption is of

REFIN

VIN7

AD7908/

AD7918/

AD7928

DSP/ P

VDD

0.1 F

AVDD

VDRIVE

DOUT

TWOS

COMPLEMENT

+REFIN

REFIN

–REFIN

011…111

000…000

100…000

(= 0V)

(= 2

REFIN)

VDD

VREF

VIN0

•

Figure 10. Handling Bipolar Signals

–17–

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