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DP8422A Datasheet(PDF) 48 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # DP8422A
Description  microCMOS Programmable 256k/1M/4M Dynamic RAM Controller/Drivers
PDF  58 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

DP8422A Datasheet(HTML) 48 Page - National Semiconductor (TI)

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130 AC Timing Parameters (Continued)
Unless otherwise stated VCC e 50V g10% 0 C k TA k 70 C the output load capacitance is typical for 4 banks of 18 DRAMs
per bank including trace capacitance (Note 2)
Two different loads are specified
CL e 50 pF loads on all outputs except
CL e 150 pF loads on Q0–8 9 10 and WE or
CH e 50 pF loads on all outputs except
CH e 125 pF loads on RAS0–3 and CAS0–3 and
CH e 380 pF loads on Q0–8 9 10 and WE
Refresh Parameter
8420A21A22A-20
8420A21A22A-25
Number
Symbol
Description
CL
CH
CL
CH
Min
Max
Min
Max
Min
Max
Min
Max
200
tSRFCK
RFSH Asserted Setup to CLK High
27
27
22
22
201
tSDRFCK
DISRFSH Asserted Setup to CLK High
28
28
22
22
202
tSXRFCK
EXTENDRF Setup to CLK High
15
15
12
12
204
tPCKRFL
CLK High to RFIP Asserted
39
39
31
31
205
tPARQRF
AREQ Negated to RFIP Asserted
62
62
50
50
206
tPCKRFH
CLK High to RFIP Negated
65
65
51
51
207
tPCKRFRASH
CLK High to Refresh RAS Negated
35
40
29
33
208
tPCKRFRASL
CLK High to Refresh RAS Asserted
28
33
23
27
209a
tPCKCL0
CLK High to CAS Asserted
during Error Scrubbing
82
90
73
80
(tRAH e 15 ns tASC e 0 ns)
209b
tPCKCL1
CLK High to CAS Asserted
during Error Scrubbing
92
100
83
90
(tRAH e 15 ns tASC e 10 ns)
209c
tPCKCL2
CLK High to CAS Asserted
during Error Scrubbing
92
100
83
90
(tRAH e 25 ns tASC e 0 ns)
209d
tPCKCL3
CLK High to CAS Asserted
during Error Scrubbing
102
110
93
100
(tRAH e 25 ns tASC e 10 ns)
210
tWRFSH
RFSH Pulse Width
15
15
15
15
211
tPCKRQL
CLK High to RFRQ Asserted
46
46
40
40
212
tPCKRQH
CLK High to RFRQ Negated
50
50
40
40
TLF8588 – F2
FIGURE 39 200 Refresh Timing
48



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