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SAA6752HS/V103 Datasheet(PDF) 8 Page - NXP Semiconductors

Part # SAA6752HS/V103
Description  MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer
PDF  71 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

SAA6752HS/V103 Datasheet(HTML) 8 Page - NXP Semiconductors

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2004 Jan 26
8
Philips Semiconductors
Product specification
MPEG-2 video and MPEG-audio/AC-3
audio encoder with multiplexer
SAA6752HS
6
PINNING
SYMBOL
PIN
INPUT/OUTPUT(1)
Imax
(mA)
DESCRIPTION
VSSP
1
ground
−
pad ground
SDATA1
2
input
−
I2S-bus serial data input port 1 with internal pull-down resistor
SCLK1
3
input/output
4
I2S-bus serial clock port 1 with internal pull-down resistor
SWS1
4
input/output
4
I2S-bus word select port 1 with internal pull-down resistor
VDDP
5
supply
−
pad ring supply voltage (3.3 V)
SDATA2
6
input/output
4
I2S-bus serial data port 2 with internal pull-down resistor
SCLK2
7
input/output
4
I2S-bus serial clock port 2 with internal pull-down resistor
SWS2
8
input/output
4
I2S-bus word select port 2 with internal pull-down resistor
ACLK
9
output
4
audio clock output (256fs or 384fs)
VSSP
10
ground
−
pad ground
IDQ
11
input
−
reserved input with internal pull-down resistor; (recommended
to connect to pin VSSP)
YUV0
12
input
−
video input signal bit 0 (LSB)
YUV1
13
input
−
video input signal bit 1
YUV2
14
input
−
video input signal bit 2
YUV3
15
input
−
video input signal bit 3
YUV4
16
input
−
video input signal bit 4
YUV5
17
input
−
video input signal bit 5
YUV6
18
input
−
video input signal bit 6
YUV7
19
input
−
video input signal bit 7 (MSB)
VSSP
20
ground
−
pad ground
HSYNC
21
input
−
horizontal sync input (video) with internal pull-down resistor
VSYNC
22
input
−
vertical sync input (video) with internal pull-down resistor
FID
23
input
−
video field identification input (odd/even field) with internal
pull-down resistor
VCLK1
24
input
−
video clock input 1 (27 MHz) with internal pull-down resistor
VSSCO
25
ground
−
core ground
VSSCO
26
ground
−
core ground
VDDCO
27
supply
−
core supply voltage (2.5 V)
VDDCO
28
supply
−
core supply voltage (2.5 V)
VDDP
29
supply
−
pad ring supply voltage (3.3 V)
VCLK2
30
input
−
video clock input 2 (27 MHz) with internal pull-down resistor
PDOAV
31
3-state output
4
parallel stream data output for audio/video identifier
PDIDS
32
input
−
parallel stream data input for data strobe [request for packet in
Data Expansion Bus Interface (DEBI) slave mode] with internal
pull-up resistor
PDOSYNC
33
3-state output
4
parallel stream data output for packet sync
VSSP
34
ground
−
pad ground
PDOVAL
35
3-state output
4
parallel stream data valid output with internal pull-up resistor
PDO0
36
3-state output
4
parallel stream data output bit 0 (LSB)



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