SAA6752HSSLASHV103 datasheet(23/71 Pages) PHILIPS

23 / 71 page

2004 Jan 26

Philips Semiconductors

Product speciﬁcation

MPEG-2 video and MPEG-audio/AC-3

audio encoder with multiplexer

SAA6752HS

7.4

Digital audio input

7.4.1

GENERAL

The audio input interface (I2S) accepts serial digital audio

data and supports master and slave mode. The interface

is able to handle 16 to 20 bits audio data with left and right

channel. Audio data with more than 20-bit word width is

accepted as input, but the additional bits are ignored.

7.4.2

AUDIO PORT CONFIGURATION OPTIONS

The following configuration options can be selected from

the host:

• AUDIO INPUT PORT SELECTION. Two digital audio

input ports are selectable.

• AUDIO INPUT FORMAT. Various I2S and EIAJ formats

can be selected.

• AUDIO INPUT MODES. Master or slave mode can be

selected.

• AUDIO CLOCK OUTPUT. An audio clock output

(256

× 48 kHz or 384 × 48 kHz) can be used for external

analog-to-digital converter clocking.

• AUDIO OUTPUT. The second audio interface port can

be configured as output in special applications e.g.

concurrent encoding of audio and video without internal

multiplexing of the two streams.

7.4.3

INPUT FORMATS

The digital audio input interface can select between two

digital audio input ports via I2C-bus control and is able to

input the following audio formats:

• I2S, see Fig.5

• EIAJ, see Fig.6

• EIAJ alternative format.

The alternative formats are defined as having the word

select shifted by one clock cycle with respect to the data.

EIAJ and EIAJ alternative format are supported for 16, 18

and 20-bit resolution. I2S and I2S alternative format are

supported for 16, 18, 20 and 24-bit resolution. Input data is

truncated to 20 bits internally if 24-bit resolution is applied.

Each of the formats can be applied in master or slave

mode.

When in master mode, the external audio analog-to-digital

convertor must be clocked using the audio clock

generated by the SAA6752HS. This can be set to

256

× 48 kHz or 384 × 48 kHz.

In slave mode an internal sample rate converter converts

the input sample frequency to a video frame locked 48 kHz

sample frequency.

If video is not present and/or the clock mode is set to

mode 3, the audio clock frequency is locked to the fixed

nominal system frequency (crystal or external). In all other

cases the audio clock will be locked to the video frame

frequency.

SAA6752HS/V103 Datasheet(PDF) 23 Page - NXP Semiconductors

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