LMP91000

SNAS506I – JANUARY 2011 – REVISED DECEMBER 2014

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Electrical Characteristics (continued)

Zero = 20% VREF.

(1)

PARAMETER

TEST CONDITIONS

UNIT

en_RW

Low Frequency integrated noise

0.1 Hz to 10 Hz, Zero Bias

3.4

between RE pin and WE pin

(5)

µVpp

0.1 Hz to 10 Hz, with Bias

5.1

(5) (6)

0% VREF

Internal Zero=20% VREF

0% VREF

–550

550

Internal Zero=50% VREF

0% VREF

Internal Zero=67% VREF

±1% VREF

–575

575

±2% VREF

–610

610

±4% VREF

–750

750

BIAS polarity

±6% VREF

–840

840

WE Voltage Offset referred to RE

(7)

µV

±8% VREF

–930

930

–40 to 80°C

±10% VREF

–1090

1090

±12% VREF

–1235

1235

±14% VREF

–1430

1430

±16% VREF

–1510

1510

±18% VREF

–1575

1575

±20% VREF

–1650

1650

±22% VREF

–1700

1700

±24% VREF

–1750

1750

0% VREF

Internal Zero=20% VREF

0% VREF

–4

4

Internal Zero=50% VREF

0% VREF

Internal Zero=67% VREF

±1% VREF

–4

4

±2% VREF

–4

4

±4% VREF

–5

5

WE Voltage Offset Drift referred

±6% VREF

–5

5

BIAS polarity

to RE from –40°C to 85°C

µV/°C

(7)

±8% VREF

–5

5

(8)

±10% VREF

–6

6

±12% VREF

–6

6

±14% VREF

–7

7

±16% VREF

–7

7

±18% VREF

–8

8

±20% VREF

–8

8

±22% VREF

–8

8

±24% VREF

–8

8

(5)

This parameter includes both A1 and TIA's noise contribution.

(6)

In case of external reference connected, the noise of the reference has to be added.

(7)

For negative bias polarity the Internal Zero is set at 67% VREF.

(8)

Offset voltage temperature drift is determined by dividing the change in VOS at the temperature extremes by the total temperature

6

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