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TAS5716PAP Datasheet(PDF) 33 Page - Texas Instruments

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Part # TAS5716PAP
Description  20-W Stereo Digital-Audio Power Amplifier With EQ and DRC
PDF  64 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TAS5716PAP Datasheet(HTML) 33 Page - Texas Instruments

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Single-Byte Read
A6
A5
A0 R/W ACK A7
A6
A5
A4
A0 ACK
A6
A5
A0
ACK
Start
Condition
Stop
Condition
Acknowledge
Acknowledge
Acknowledge
I CDevice Addressand
2
Read/WriteBit
Subaddress
DataByte
D7
D6
D1
D0 ACK
I CDevice Addressand
Read/WriteBit
2
Not
Acknowledge
R/W
A1
A1
RepeatStart
Condition
T0036-03
Multiple-Byte Read
A6
A0
ACK
Acknowledge
I CDevice Addressand
Read/WriteBit
2
R/W
A6
A0
R/W ACK
A0 ACK
D7
D0
ACK
Start
Condition
Stop
Condition
Acknowledge
Acknowledge
Acknowledge
LastDataByte
ACK
FirstDataByte
RepeatStart
Condition
Not
Acknowledge
I CDevice Addressand
Read/WriteBit
2
Subaddress
OtherDataBytes
A7
A6
A5
D7
D0 ACK
Acknowledge
D7
D0
T0036-04
TAS5716
www.ti.com............................................................................................................................................................................................... SLOS569 – JANUARY 2009
As shown in Figure 42, a single-byte data-read transfer begins with the master device transmitting a start
condition followed by the I2C device address and the read/write bit. For the data-read transfer, both a write
followed by a read are actually done. Initially, a write is done to transfer the address byte or bytes of the internal
memory address to be read. As a result, the read/write bit becomes a 0. After receiving the TAS5716 address
and the read/write bit, TAS5716 responds with an acknowledge bit. In addition, after sending the internal memory
address byte or bytes, the master device transmits another start condition followed by the TAS5716 address and
the read/write bit again. This time the read/write bit becomes a 1, indicating a read transfer. After receiving the
address and the read/write bit, the TAS5716 again responds with an acknowledge bit. Next, the TAS5716
transmits the data byte from the memory address being read. After receiving the data byte, the master device
transmits a not-acknowledge followed by a stop condition to complete the single-byte data-read transfer.
Figure 42. Single-Byte Read Transfer
A multiple-byte data read transfer is identical to a single-byte data-read transfer except that multiple data bytes
are transmitted by the TAS5716 to the master device as shown in Figure 43. Except for the last data byte, the
master device responds with an acknowledge bit after receiving each data byte.
Figure 43. Multiple-Byte Read Transfer
Copyright © 2009, Texas Instruments Incorporated
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