LP8754 datasheet(38/53 Pages) TI1

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LP8754

SNVS861A – FEBRUARY 2014 – REVISED AUGUST 2014

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Typical Application (continued)

8.2.1 Design Requirements

Table 6 shows requirements for 6-phase configuration.

Table 6. Design Parameters

DESIGN PARAMETER

EXAMPLE VALUE

Input voltage range

2.5 V to 5 V

Output voltage

1.1 V

Converter operation mode

Forced PWM

Maximum load current

10 A

Inductor current limit

2.5 A

8.2.2 Detailed Design Procedure

The performance of the LP8754 device depends greatly on the care taken in designing the Printed Circuit Board

(PCB). The use of low inductance and low serial resistance ceramic capacitors is strongly recommended, while

proper grounding is crucial. Attention should be given to decoupling the power supplies. Decoupling capacitors

must be connected close to the IC and between the power and ground pins to support high peak currents being

drawn from System Power Rail during turn-on of the switching MOSFETs. Keep input and output traces as short

as possible, because trace inductance, resistance and capacitance can easily become the performance limiting

items. The separate power pins VINBXX are not connected together internally. The VINBXX power connections

shall be connected together outside the package using power plane construction.

8.2.2.1 Inductor Selection

The DC bias current characteristics of inductors must be considered. Different manufacturers follow different

saturation current rating specifications, so attention must be given to details. (Please request DC bias curves

from the manufacturer as part of the inductor selection process.) Minimum effective value of inductance to

ensure good performance is 0.25 µH at 2.5 A (Default ILIMITP typ.) bias current over the inductor's operating

temperature range. The inductor’s DC resistance should be less than 0.05

Ω for good efficiency at high-current

condition. The inductor AC loss (resistance) also affects conversion efficiency. Higher Q factor at switching

frequency usually gives better efficiency at light load to middle load. Table 7 below lists suggested inductors and

suppliers. Shielded inductors radiate less noise and are preferable.

Table 7. Suggested Inductors

ITEM

MODEL

VENDOR

DIMENSIONS LxWxH (mm) D.C.R (m

Ω) MAX

L0 to L5; Step-down

LQM21PNR47MGH

Murata

2.0 x 1.2 x 1.0

40 (typ)

converter inductor 0.47

DFE252012 R47

TOKO

2.5 x 2 x 1.2

µH

DFE201612C R47N

TOKO

2.0 x 1.6 x 1.2

8.2.2.2 Input Capacitor Selection

A ceramic input capacitor of 10 µF, 10 V is sufficient for most applications. Place the input capacitor as close as

possible to the VINBXX pin and GND pin of the device. A larger value or higher voltage rating may be used to

improve input voltage filtering. Use X7R or X5R types, do not use Y5V. DC bias characteristics of ceramic

capacitors must be considered when selecting case sizes like 0402. Minimum effective input capacitance to

ensure good performance is 2.5 µF at maximum input voltage DC bias including tolerances and over ambient

temp range, assuming that there is at least 22 µF of additional capacitance common for all the power input pins

on the system power rail.

The input filter capacitor supplies current to the PFET (high-side) switch in the first half of each cycle and

reduces voltage ripple imposed on the input power source. A ceramic capacitor's low ESR provides the best

noise filtering of the input voltage spikes due to this rapidly changing current. Select an input filter capacitor with

sufficient ripple current rating.

For additional noise immunity, adding a high-frequency decoupling capacitor of 100 nF to 1 µF between VDDA5V

pin and GND is recommended.

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