–6–

AD7490

REV. A

28-Lead TSSOP

PIN FUNCTION DESCRIPTIONS

Mnemonic

Function

CS

Chip Select. Active low logic input. This input provides the dual function of initiating conversions on the

AD7490 and also frames the serial data transfer.

Reference Input for the AD7490. An external reference must be applied to this input. The voltage range

for the external reference is 2.5 V

± 1% for specified performance.

AGND

Analog Ground. Ground reference point for all circuitry on the AD7490. All analog/digital input signals

and any external reference signal should be referred to this AGND voltage. All AGND pins should be

connected together.

Analog Input 0 through Analog Input 15. Sixteen single-ended analog input channels that are multiplexed

into the on-chip track-and-hold. The analog input channel to be converted is selected by using the address

bits ADD3 through ADD0 of the control register. The address bits in conjunction with the SEQ and

SHADOW bits allow the Sequence Register to be programmed. The input range for all input channels can

Any unused input channels should be connected to AGND to avoid noise pickup.

DIN

Data In. Logic input. Data to be written to the AD7490’s Control Register is provided on this input and

is clocked into the register on the falling edge of SCLK (see Control Register section).

DOUT

Data Out. Logic output. The conversion result from the AD7490 is provided on this output as a serial

data stream. The bits are clocked out on the falling edge of the SCLK input. The data stream consists

of four address bits indicating which channel the conversion result corresponds to, followed by the 12 bits

of conversion data, which is provided MSB first. The output coding may be selected as straight binary or

twos complement via the CODING Bit in the Control Register.

SCLK

Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock

input is also used as the clock source for the AD7490’s conversion process.

Logic Power Supply Input. The voltage supplied at this pin determines at what voltage the serial interface

of the AD7490 will operate.

32-Lead LFCSP

TOP VIEW

(Not to Scale)

NC

AGND

AGND

CS

NC

NC

NC = NO CONNECT

AD7490

DIN

9

10

11 12 13 14

15

16

24

23

22

21

20

19

18

17

1

2

3

4

5

6

7

8

32

31 30

29

28 27

26 25

EXPOSED PAD SHOULD BE TIED TO AGND

TOP VIEW

(Not to Scale)

PIN CONFIGURATIONS

*

*ALL NC PINS SHOULD BE CONNECTED STRAIGHT TO AGND

TOP VIEW

(Not to Scale)

28

27

26

25

24

23

22

21

20

19

18

17

16

15

1

2

3

4

5

6

7

8

9

10

11

12

13

14

AD7490

NC = NO CONNECT

AGND

NC

DOUT

SCLK

NC

DIN

CS

AGND

AGND