®

OPA124

3

CONNECTION DIAGRAMS

Top View

DIP

1

2

3

4

8

7

6

5

Substrate

+V

S

Output

Offset Trim

Offset Trim

–In

+In

–V

S

Top View

SOIC

1

2

3

4

8

7

6

5

Substrate

+V

S

Output

NC

NC

–In

+In

–V

S

NC = No Connect

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes

no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change

without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant

any BURR-BROWN product for use in life support devices and/or systems.

PACKAGE/ORDERING INFORMATION

BIAS

OFFSET

PACKAGE

TEMPERATURE

CURRENT

DRIFT

PRODUCT

PACKAGE

RANGE

pA, max

OPA124U

8-Lead SOIC

182

–25

°C to +85°C

5

7.5

OPA124P

8-Pin Plastic DIP

006

–25

°C to +85°C

5

7.5

OPA124UA

8-Lead SOIC

182

–25

°C to +85°C2

4

OPA124PA

8-Pin Plastic DIP

006

–25

°C to +85°C2

4

OPA124PB

8-Pin Plastic DIP

006

–25

°C to +85°C1

2

NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book.

Supply ...........................................................................................

±18VDC

±36VDC

±18VDC

Storage Temperature Range .......................................... –65

°C to +150°C

Operating Temperature Range ....................................... –40

°C to +125°C

Lead Temperature (soldering, 10s) ................................................ +300

°C

Junction Temperature .................................................................... +175

°C

NOTES: (1) Stresses above these ratings may cause permanent damage.

(2) Packages must be derated based on

θ

for SOIC. (3) For supply voltages less than

±18VDC, the absolute maximum

may be to power supply common only. Rating applies to +25

°C ambient.

ELECTROSTATIC

DISCHARGE SENSITIVITY

This integrated circuit can be damaged by ESD. Burr-Brown

recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling

and installation procedures can cause damage.

ESD damage can range from subtle performance degrada-

tion to complete device failure. Precision integrated circuits

may be more susceptible to damage because very small

parametric changes could cause the device not to meet its

published specifications.