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OPA690 Datasheet(PDF) 18 Page - Texas Instruments

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Part # OPA690
Description  Wideband, Voltage Feedback OPERATIONAL AMPLIFIER With Disable
PDF  22 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

OPA690 Datasheet(HTML) 18 Page - Texas Instruments

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OPA690
18
SBOS223A
www.ti.com
LOW, additional current is pulled through the 15k
Ω resistor,
eventually turning on those two diodes (
≈75µA). At this point,
any further current pulled out of V
DIS goes through those
diodes holding the emitter-base voltage of Q1 at approxi-
mately 0V. This shuts off the collector current out of Q1,
turning the amplifier off. The supply current in the disable
mode are only those required to operate the circuit of Figure
13. Additional circuitry ensures that turn-on time occurs
faster than turn-off time (make-before-break).
When disabled, the output and input nodes go to a high
impedance state. If the OPA690 is operating in a gain of +1,
this will show a very high impedance at the output and
exceptional signal isolation. If operating at a gain greater
than +1, the total feedback network resistance (RF + RG) will
appear as the impedance looking back into the output, but
the circuit will still show very high forward and reverse
isolation. If configured as an inverting amplifier, the input and
output will be connected through the feedback network
resistance (RF + RG) and the isolation will be very poor as a result.
One key parameter in disable operation is the output glitch
when switching in and out of the disabled mode. Figure 14
shows these glitches for the circuit of Figure 1 with the input
signal at 0V. The glitch waveform at the output pin is plotted
along with the DIS pin voltage.
A fine-scale output offset null, or DC operating point adjust-
ment, is often required. Numerous techniques are available
for introducing DC offset control into an op amp circuit. Most
of these techniques eventually reduce to adding a DC current
through the feedback resistor. In selecting an offset trim
method, one key consideration is the impact on the desired
signal path frequency response. If the signal path is intended
to be noninverting, the offset control is best applied as an
inverting summing signal to avoid interaction with the signal
source. If the signal path is intended to be inverting, applying
the offset control to the noninverting input may be consid-
ered. However, the DC offset voltage on the summing
junction will set up a DC current back into the source which
must be considered. Applying an offset adjustment to the
inverting op amp input can change the noise gain and
frequency response flatness. For a DC-coupled inverting
amplifier, Figure 12 shows one example of an offset adjust-
ment technique that has minimal impact on the signal fre-
quency response. In this case, the DC offsetting current is
brought into the inverting input node through resistor values
that are much larger than the signal path resistors. This will
insure that the adjustment circuit has minimal effect on the
loop gain and hence the frequency response.
FIGURE 13. Simplified Disable Control Circuit.
FIGURE 12. DC-Coupled, Inverting Gain of –2, with Offset
Adjustment.
FIGURE 14. Disable/Enable Glitch.
R
F
1k
±200mV Output Adjustment
= –
= –2
Supply Decoupling
Not Shown
5k
5k
328
0.1
µF
R
G
500
V
I
20k
10k
0.1
µF
–5V
+5V
OPA690
+5V
–5V
V
O
V
O
V
I
R
F
R
G
25k
110k
15k
I
S
Control
–V
S
+V
S
V
DIS
Q1
DISABLE OPERATION
The OPA690 provides an optional disable feature that may
be used either to reduce system power or to implement a
simple channel multiplexing operation. If the DIS control pin
is left unconnected, the OPA690 will operate normally. To
disable, the control pin must be asserted LOW. Figure 13
shows a simplified internal circuit for the disable control
feature.
In normal operation, base current to Q1 is provided through
the 110k
Ω resistor, while the emitter current through the
15k
Ω resistor sets up a voltage drop that is inadequate to
turn on the two diodes in Q1’s emitter. As V
DIS is pulled
DISABLE/ENABLE GLITCH
Time (20ns/div)
30
20
10
0
–10
–20
–30
6
4
2
0
V
i = 0V
V
DIS
Output Voltage



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