AL3050_2 datasheet(13/16 Pages) DIODES

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AL3050

Document number: DS38578 Rev. 2 - 2

13 of 16

www.diodes.com

July 2016

AL3050

Application Information (Cont.)

If above conditions are met, after tVAL_ACKN (3.5μs) delay from the moment when the last falling edge of the protocol is detected, an internal

ACKN-MOSFET is turned on to pull the CTRL pin low for the time tACKN (900μs maximum), then the Acknowledge condition is valid. During the

tVAL_ACKN delay, the master controller keeps the line low; after the delay, it should release the line by outputting high impedance and then detect

the acknowledge condition. If it reads back a logic 0, it means the IC has received the command correctly. The CTRL pin can be used again by the

master when the acknowledge condition ends after tACKN time.

Note that the acknowledge condition may only be requested in case the master device has an open drain output. For a push-pull output stage, the

use a series resistor in the CRTL line to limit the current to 500μA is recommended to for such cases as:

• an accidentally requested acknowledge, or

• to protect the internal ACKN-MOSFET.

tSTART

Static High

DA7

Address Byte

DA0

tEOS

tSTART

RFA

DATA Byte

tEOS

Static High

DATA IN

Figure 4. Single Wire Digital Dimming Timing, without Acknowledge RFA=0

tSTART

Static High

DA7

Address Byte

DA0

tEOS

tSTART

RFA

DATA Byte

tvalACKN

DATA IN

DATA OUT

ACKN

tACKN

Static High

Acknowledge

true, Data line

pulled down by

device

Controller needs to

Pullup Data Line via a

resistor to detect ACKN

Acknowledge

false, no pull

down

Figure 5. Single Wire Digital Dimming Timing, with Acknowledge RFA=1

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