DS2770

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MEMORY MAP Figure 11

ADDRESS (HEX)

DESCRIPTION

R/W

00

Reserved

01

Status Register

R**

02

Elapsed Time Register MSB

R/W

03

Elapsed Time Register LSB

R/W

04 to 05

Reserved

06

Charge Time Register

R/W

07

EEPROM Register

R/W

08 to 0B

Reserved

0C

Voltage Register MSB

R

0D

Voltage Register LSB

R

0E

Current Register MSB

R

0F

Current Register LSB

R

10

Accumulated Current Register MSB

R/W

11

Accumulated Current Register LSB

R/W

12 to 17

Reserved

18

Temperature Register MSB

R

19

Temperature Register LSB

R

1A to 1F

Reserved

20 to 2F

Lockable EEPROM Block 0

R/W*

30 to 3F

Lockable EEPROM Block 1

(31 = Status Register Initialization)

(32 to 33 = Current Offset Register)

(34 = Charge Time Register Initialization)

R/W*

40 to 47

Lockable EEPROM Block 2

R/W*

48 to 7F

Reserved

80 to 8F

General-Purpose SRAM

R/W

90 to FF

Reserved

* The lockable EEPROM address locations 20h through 47h are writeable until locked by using the Lock

function command [6Axxh], after which it is read only.

** The Status Register bits are read only. However, writing any byte value to the Status Register is

required to clear a previous charge completion condition flagged with both CSTAT1, CSTAT0 bits set.

STATUS REGISTER

The default values for the Status Register are stored in lockable EEPROM in the corresponding bits of

address 31h. These values in address location 31h are supplied directly to the Status Register (not from

shadow RAM) on either a device power-up or upon execution of the Refresh command. Changes to the

Status Register bits must be made to the EEPROM location 31h, and then use the Refresh command to

recall the changes to the Status Register. Figure 12 shows the format of the Status Register. The function

of each bit is described in detail in the following paragraphs.