5/12

sames

SA9904B

http://www.sames.co.za

Where:

I = Line current or if a CT is used

= Line current / CT ratio

Rsh = Shunt resistor or CT termination resistor.

Rsh should be less than the resistance of the CT's secondary

winding.

Figure 6 shows the voltage sense (IVP) input configuration for

one phase. The exact circuit is duplicated for the other two

phases. The current into the voltage sense inputs (virtual

ground) should be set to

at rated voltage conditions.

L

I

14µA

The voltage sense inputs saturate at an input current of ±25µA

peak.

L

RMS

Voltage Sense Input (IVP1, IVP2, IVP3)

the micro controller and the SA9904B. The clock signal on this

pin is generated by the micro controller and determines the

data transfer rate of the DO and DI pins.

The DI pin is the serial data input pin for the SA9904B. Data will

be input at a rate determined by the Serial Clock (SCK). Data

will be accepted only during an active chip select (CS).

The CS input is used to address the SA9904B. An active high

on this pin enables the SA9904B to initiate data exchange.

Serial Data In (DI)

Chip Select (CS)

OUTPUT SIGNALS

Serial Data Out (DO)

Mains Voltage sense zero crossover (F50)

The DO pin is the serial data output pin for the SA9904B. The

Serial Clock (SCK) determines the data output rate. Data is

only transferred during on active chip select (CS). This output

is tri-state when CS is low.

The F50 output generates a signal, which follows the mains

voltage zero crossings, see figure 7.

The micro controller can use the F50 to extract

mains timing.

This output generates a

pulse on the rising edge of the mains voltage zero crossing

point. Internal logic ensures that this signal is generated from a

valid phase. Should all three phase be missing but power still

applied to the SA9904B this output will generate a constant

54Hz signal.

Figure 7: Mains voltage zero crossover

Figure 6: Voltage sense input configuration

The individual mains voltages are divided down to

per

phase. The resistor R8 sets the current for the voltage sense

input. The voltage divider is calculated for a voltage drop of 14V.

With a phase voltage of 230V the equation for the voltage divider

is:

RA = R16 + R19 + R22

RB = R8 || R13

Combining the two equations gives:

(RA + RB) / 230V = RB / 14V

A 24K resistor is chosen for R13 and a 1M resistor for R8.

Substituting these values results in:

RB = 23.44K

RA = RB x (230V / 14V-1)

RA = 361.6K

Resistor values for R16, R19 and R22 is chosen to be 120K

each.

The capacitor C5 is used to compensate for any phase shift

caused by

the current transformer. As an example to compensate for a

phase shift of 0.18 degrees the capacitor value is calculated as

follows:

The VREF pin is the reference for the bias resistor. With a bias

resistor of 47k

connected to Vss optimum conditions are set.

The SCK pin is used to synchronize data interchange between

between the voltage sense and current sense input

C = 1 / (2 x

x Mains frequency x R5 x tan (Phase shift angle))

C = 1 / (2 x

x 50Hz x 1M

x tan (0.18 degrees))

C = 1.013µF

p

p

W

Reference Voltage (VREF)

Serial Clock (SCK)

W

R8

R13

Ch1 Voltage

C5

R16

R19

R22

IVP1

Neutral

GND

GND

14µA

RMS

14V

RMS

Dr-01645

SPI - INTERFACE

Description

A serial peripheral interface bus (SPI) is a synchronous bus

used for data transfers between a micro controller and the

SA9904B. The pins DO (Serial Data Out), DI (Serial Data In),

CS (Chip Select), and SCK (Serial Clock) are used in the bus

implementation. The SA9904B is the slave device with the

micro controller being bus master. The CS input initiates and

terminates data transfers. A SCK signal (generated by the

micro controller) strobes data between the micro-controller

F50

1ms to 2ms

+5V

0V (Vss)

Phase Voltage

Dr-01646

1ms to 2ms