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Revision 3.1

Processor Programming (Continued)

3.7.3

GDTR and LDTR Registers

The GDT, and LDT descriptor tables are defined by the

Global Descriptor Table Register (GDTR) and the Local

Descriptor Table Register (LDTR) respectively. Some texts

refer to these registers as GDT, and LDT descriptors.

The following instructions are used in conjunction with the

GDT and LDT registers:

• LGDT - Load memory to GDTR

• LLDT - Load memory to LDTR

• SGDT - Store GDTR to memory

• SLDT - Store LDTR to memory

The GDTR is set up in REAL mode using the LGDT

instruction. This is possible as the LGDT instruction is one

of two instructions that directly load a linear address

(instead of a segment relative address) in protective

mode. (The other instruction is the Load Interrupt Descrip-

tor Table [LIDT]).

As shown in Table 3-20, the GDT registers contain a

BASE ADDRESS field and a LIMIT field that define the

GDT tables. (The IDTR is described in Section 3.7.3.2

“Task, Gate and Interrupt Descriptors” on page 67.)

Also shown in Table 3-20, the LDTR is only two bytes wide

as it contains only a SELECTOR field. The contents of the

SELECTOR field point to a descriptor in the GDT.

3.7.3.1

Segment Descriptors

There are several types of descriptors. A segment

descriptor defines the base address, limit and attributes of

a memory segment.

The GDT or LDT can hold several types of descriptors. In

particular, the segment descriptors are stored in either of

two registers, the GDT, or the LDT as shown in Table 3-

20). Either of these tables can store as many as 8,192

(213) eight-byte selectors taking as much as 64 KB of

memory.

The first descriptor in the GDT (location 0) is not used by

the CPU and is referred to as the “null descriptor.”

Types of Segment Descriptors

The type of memory segments are defined by correspond-

ing types of segment descriptors:

• Code Segment Descriptors

• Data Segment Descriptors

• Stack Segment Descriptors

• LDT Segment Descriptors

Table 3-20. GDTR, LDTR and IDTR Registers

16 15 14 13 12 11 10

8765

43210

GDT Register

Global Descriptor Table Register

BASE

LIMIT

IDT Register

Interrupt Descriptor Table Register

BASE

LIMIT

LDT Register

Local Descriptor Table Register

SELECTOR

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