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GXM Datasheet(PDF) 85 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # GXM
Description  Geode??GXm Processor Integrated x86 Solution with MMX Support
PDF  244 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

GXM Datasheet(HTML) 85 Page - National Semiconductor (TI)

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Revision 3.1
85
www.national.com
Processor Programming (Continued)
3.11.9.2 CPU States Related to SMM and Suspend
Mode
The state diagram shown in Figure 3-12 illustrates the var-
ious CPU states associated with SMM and Suspend
mode. While in the SMI service routine, the GXm proces-
sor core can enter Suspend mode either by (1) executing
a halt (HLT) instruction or (2) by asserting the SUSP#
input.
During SMM operations and while in SUSP#-initiated
Suspend mode, an occurrence of either NMI or INTR is
latched. (In order for INTR to be latched, the IF flag,
EFLAGS register bit 9, must be set.) The INTR or NMI is
serviced after exiting Suspend mode.
If Suspend mode is entered through a HLT instruction
from the operating system or application software, the
reception of an SMI# interrupt causes the CPU to exit
Suspend mode and enter SMM. If Suspend mode is
entered through the hardware (SUSP# = 0) while the
operating system or application software is active, the
CPU latches one occurrence of INTR, NMI, and SMI#.
Figure 3-12. SMM and Suspend Mode State Diagram
Suspend Mode
(SUSPA# = 0)
Suspend Mode
(SUSPA# = 0)
Suspend Mode
(SUSPA# = 0)
NMI or INTR
HLT*
IRET*
RSM*
SMI# = 0
SMINT*
SUSP# = 1
SUSP# = 0
Interrupt Service
Routine
Interrupt Service
Routine
OS/Application
Software
SMI Service Routine
(SMI# = 0)
NMI or INTR
RESET
SMI# = 0
(INTR, NMI and SMI# latched)
Non-SMM Operations
SMM Operations
Interrupt Service
Routine
Suspend Mode
(SUSPA# = 0)
(INTR and NMI latched)
NMI or INTR
IRET*
SUSP# = 0
SUSP# = 1
IRET*
HLT*
NMI or INTR
*Instructions



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