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GXM Datasheet(PDF) 205 Page - National Semiconductor (TI) |
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GXM Datasheet(HTML) 205 Page - National Semiconductor (TI) |
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205 / 244 page  Revision 3.1 205 www.national.com Instruction Set (Continued) 9.1.3 mod and r/m Byte (Memory Addressing) Themod andr/m fields within themod r/mbyte, select the type of memory addressing to be used. Some instructions use a fixed addressing mode (e.g., PUSH or POP) and therefore, these fields are not present. Table 9-8 lists the addressing method when 16-bit addressing is used and a mod r/m byte is present. Some mod r/m field encodings are dependent on the w field and are shown in Table 9-8. Table 9-8. General Registers Selected by mod r/m Fields and w Field mod r/m 16-Bit Operation 32-Bit Operation w = 0w = 1 w = 0w = 1 11 000 AL AX AL EAX 11 001 CL CX CL ECX 11 010 DL DX DL EDX 11 011 BL BX BL EBX 11 100 AH SP AH ESP 11 101 CH BP CH EBP 11 110 DH SI DH ESI 11 111 BH DI BH EDI Table 9-9. mod r/m Field Encoding mod Field r/m Field 16-Bit Address Mode with mod r/m Byte 32-Bit Address Mode with mod r/m Byte and No s-i-b Byte Present 00 000 DS:[BX+SI] DS:[EAX] 00 001 DS:[BX+DI] DS:[ECX] 00 010 SS:[BP+SI] DS:[EDX] 00 011 SS:[BP+DI] DS:[EBX] 00 100 DS:[SI] s-i-b is present (See Table 9-15) 00 101 DS:[DI] DS:[d32] 00 110 DS:[d16] DS:[ESI] 00 111 DS:[BX] DS:[EDI] 01 000 DS:[BX+SI+d8] DS:[EAX+d8] 01 001 DS:[BX+DI+d8] DS:[ECX+d8] 01 010 SS:[BP+SI+d8] DS:[EDX+d8] 01 011 SS:[BP+DI+d8] DS:[EBX+d8] 01 100 DS:[SI+d8] s-i-b is present (See Table 9-15) 01 101 DS:[DI+d8] SS:[EBP+d8] 01 110 SS:[BP+d8] DS:[ESI+d8] 01 111 DS:[BX+d8] DS:[EDI+d8] 10 000 DS:[BX+SI+d16] DS:[EAX+d32] 10 001 DS:[BX+DI+d16] DS:[ECX+d32] 10 010 SS:[BP+SI+d16] DS:[EDX+d32] 10 011 SS:[BP+DI+d16] DS:[EBX+d32] 10 100 DS:[SI+d16] s-i-b is present (See Table 9-15) 10 101 DS:[DI+d16] SS:[EBP+d32] 10 110 SS:[BP+d16] DS:[ESI+d32] 10 111 DS:[BX+d16] DS:[EDI+d32] 11 xxx See Table 9-8. See Table 9-8 Note: Note: d8 refers to 8-bit displacement, and d16 refers to 16-bit displacement. |
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