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DA7210 Datasheet(PDF) 32 Page - Dialog Semiconductor |
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DA7210 Datasheet(HTML) 32 Page - Dialog Semiconductor |
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32 / 113 page ![]() DA7210 Ultra-low power stereo codec Company confidential Datasheet Revision 3a 15-Oct-2015 CFR0011-120-00 Rev 5 32 of 113 © 2015 Dialog Semiconductor Examples for ALC_ATT (address 0x86, Table 175). (fs=44.1 kHz; sample period = 22.67 µs) Setting ms per 1 dB step 11111111 (FF) 23.2 10111111 (BF) 17.4 01111111 (7F) 11.6 00111111 (3F) 5.8 00011111 (1F) 2.9 00001111 (0F) 1.5 00000100 (04) 0.5 Examples for ALC_REL (address 0x87,Table 176). (fs=44.1 kHz; sample period = 22.67 µs) Setting ms per 1 dB step 11111111 (FF) 92.9 10111111 (BF) 69.7 01111111 (7F) 46.4 00111111 (3F) 23.2 00011111 (1F) 11.6 00001111 (0F) 5.8 00000100 (04) 0.5 8.1.6 Noise gate A noise gate feature is provided to avoid ‘noise pumping’ where the gain of the channel is increased to the maximum when there is no signal is present (that is only noise). If the level of the input signal drops below the threshold configured inside control ALC_NOIS (address 0x85, Table 174) the channel gain is held. 8.2 Output signal chain 8.2.1 Stereo audio DAC The integrated stereo DAC is suitable for high quality audio playback of MP3 files and portable multimedia files of all kinds. The DAC has individually enabled channels via controls DAC_L_EN and DAC_R_EN (address 0x17, Table 64). The DA7210 supports the option of individually phase inverted output signals using controls DAC_L_INV (address 0x15, Table 62).and DAC_R_INV (address 0x16, Table 63). A digital high pass filter for each DAC channel is implemented (configurable by control DAC_HPF_F0 (address 0x14, Table 61) that can be enabled via control DAC_HPF_EN (address 0x14, Table 61, see blocks ‘DAC HP’ in Figure 16). After Reset, the high pass filters for both channels are enabled by default. |
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