DA7210 datasheet(4/113 Pages) DIALOG

4 / 113 page

DA7210

Ultra-low power stereo codec

Company confidential

Datasheet

Revision 3a

15-Oct-2015

CFR0011-120-00 Rev 5

4 of 113

Figure 10: ADC pass band suppression (audio mode, 48 kHz) .......................................................... 30

Figure 11: Operation of ALC................................................................................................................ 30

Figure 12: DAC DC blocking (cut-

off frequency setting ‘00’ to ‘11’, 48 kHz)....................................... 33

Figure 13: DAC pass band attenuation (audio mode, 48 kHz)............................................................ 34

Figure 14: DAC pass band suppression (audio mode, 48 kHz) .......................................................... 34

Figure 15: DA7210 audio signal paths ................................................................................................ 36

Figure 16: Digital signal processing engine (simplified block diagram) .............................................. 39

Figure 17: Direct form I implementation of a second order IIR filter ................................................... 39

Figure 18: Band 5 (LP 50 Hz) frequency response at FS = 48 kHz.................................................... 42

Figure 19: Band 5 (BP 150 Hz) frequency response at FS = 48 kHz ................................................. 42

Figure 20: Band 5 (BP 500 Hz) frequency response at FS = 48 kHz ................................................. 43

Figure 21: Band 5 (BP 2500 Hz) frequency response at FS = 48 kHz ............................................... 43

Figure 22: Band 5 (HP 5000 Hz) frequency response at FS = 48 kHz ............................................... 43

Figure 23: Record only ........................................................................................................................ 44

Figure 24: Record with sound monitor ................................................................................................ 44

Figure 25: Stereo playback (for example, freefield headphone equalisation) ..................................... 45

Figure 26: Sound spatialiser for stereo speaker ................................................................................. 46

Figure 27: Voice mode recording high-pass filter (cut-of

f frequency setting ‘000’ to ‘111’, 8 kHz) .... 47

Figure 28: Voice mode recording frequency response (setting ‘001’, 8 kHz) ..................................... 48

Figure 29: Voice mode recording stop band suppression (8 kHz) ...................................................... 48

Figure 30: Voice mode playback high-pass filter (cut-

off frequency setting ‘000’ to ‘111’, 16 kHz)... 49

Figure 31: Voice mode playback frequency response (setting ‘001’, 8 kHz) ...................................... 49

Figure 32: Voice mode playback stop band suppression (8 kHz) ....................................................... 50

Figure 33: Transmit (red), receive (green) and sidetone (blue) sound filtering for phone applications

............................................................................................................................................................. 50

Figure 34: Right justified format .......................................................................................................... 52

Figure 35: Left justified format ............................................................................................................. 52

Figure 36: I2S format........................................................................................................................... 52

Figure 37: DSP format......................................................................................................................... 53

Figure 38: TDM left justified format ..................................................................................................... 53

Figure 39: TDM DSP format ................................................................................................................ 53

Figure 40: PLL master mode start up sequence ................................................................................. 58

Figure 41: Non-PLL mode start-up sequence ..................................................................................... 61

Figure 42: PLL Slave mode start-up sequence ................................................................................... 63

Figure 43: PLL block diagram.............................................................................................................. 64

Figure 44: Schematic of a 4-wire and a 2-wire control bus ................................................................. 64

Figure 45: 4-

wire host write and read timing (nCS_POL = ‘0’, CPOL = ‘0’, CPHA = ‘1’’) ................... 66

Figure 46: 2-wire byte write (SI/DATA line) ......................................................................................... 67

Figure 47: Examples of 2-wire byte read (SI/DATA line) .................................................................... 67

Figure 48: Examples of 2-wire page read (SI/DATA line) ................................................................... 68

Figure 49: 2-wire page write (SI/DATA line)........................................................................................ 68

Figure 50: 2-wire repeated write (SI/DATA line) ................................................................................. 68

Figure 51: 49 bump WL-CSP 0.4mm pitch package outline drawing ............................................... 110

Tables

Table 1: Pin description ....................................................................................................................... 10

Table 2: Pin type definition .................................................................................................................. 12

Table 3: Absolute maximum ratings .................................................................................................... 14

Table 4: Recommended operating conditions..................................................................................... 14

Table 5: Power dissipation table ......................................................................................................... 15

Table 6: Electrical characteristics: Microphone bias ........................................................................... 16

Table 7: Electrical characteristics: Input mixing units.......................................................................... 16

Table 8: Electrical characteristics: Analogue to digital converter (ADC) ............................................. 17

Table 9: Electrical characteristics: Digital to analogue converter (DAC)............................................. 18

Table 10: Electrical characteristics: Line out and receiver amplifier ................................................... 19

Table 11: Electrical characteristics: Line out amplifier ........................................................................ 20

Table 12: Electrical characteristics: Dynamic charge pump................................................................ 20

DA7210 Datasheet(PDF) 4 Page - Dialog Semiconductor

DA7210 Datasheet(HTML) 4 Page - Dialog Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL