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DA9062 Datasheet(PDF) 49 Page - Dialog Semiconductor

Part # DA9062
Description  Entry level PMIC for applications requiring up to 8.5 A
PDF  93 Pages
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Manufacturer  DIALOG [Dialog Semiconductor]
Direct Link  http://www.dialog-semiconductor.com/
Logo DIALOG - Dialog Semiconductor

DA9062 Datasheet(HTML) 49 Page - Dialog Semiconductor

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DA9062
Entry level PMIC for applications requiring up to 8.5 A
Datasheet
Revision 3.2
18-Feb-2015
49 of 93
© 2016 Dialog Semiconductor
7.9.4
Wait step
One of the sequencer steps (any step greater than zero) can be configured as a wait step, in which
the sequencer stays until an event is detected in the GPI3 input, see Section 7.3.1.2.
NOTE
The E_GPI3 event has to be cleared after the power-up sequence completes. Otherwise, the wait step in the
next power-up sequence will be ineffective.
The wait step features an optional 500 ms timeout, which can be used when the wait event never
occurs. If the timeout occurs, the steps following the wait step are not executed and a shutdown
sequence to RESET mode is triggered. The shutdown reason is signalled with the WAIT_SHUT bit.
Alternatively, the wait step can be used as a configurable delay in the sequence (WAIT_MODE,
WAIT_TIME).
7.9.5
32 kHz clock output
If a GPO is used as a 32 kHz clock output see Section 7.3.2.2, the clock buffer can be
enabled/disabled in one of the sequencer steps (any step greater than zero). The clock buffer is
enabled when, during power-up, the sequencer reaches the step EN32K_STEP. Likewise, the buffer
is disabled when the sequencer reaches the step EN32K_STEP on the way down.
7.9.6
Power-down disable
The PD_DIS_STEP pointer can be used to define a step in the power-up sequence above which a
group of functions will be enabled. The functions concerned can be controlled in the PD_DIS register.
Similarly, in the power-down sequence, the same groups of functions will be disabled when the
sequencer proceeds below the PD_DIS_STEP.
7.10 Junction temperature supervision
To protect DA9062 from damage due to excessive power dissipation, the junction temperature is
continuously monitored. The monitoring is split into three temperature ranges TEMP_WARN
(125 °C), TEMP_CRIT (140 °C), and TEMP_POR (150 °C).
If the junction temperature rises above the first threshold (TEMP_WARN), the event E_TEMP is
asserted. If the event is not masked, this will issue an interrupt. This first level of temperature
supervision is intended for non-invasive temperature control, where the necessary measures for
cooling the system down are left to the host software.
If the junction temperature increases even further and crosses the second threshold (TEMP_CRIT) a
temperature error flag is issued and a shutdown sequence to RESET mode is triggered, see
Section 7.8.3. The nRESET output is asserted at the beginning of the shutdown sequence.
Therefore, the second level of the temperature supervision does not rely on the host software to take
counter-measures. The fault flag can be evaluated by the application after the next power up.
There is also a third temperature threshold (TEMP_POR) which causes DA9062 to enter RESET
mode without any sequencing and stop all functions except the RTC. This prevents possible
permanent damage due to fast temperature increases.
7.11 System supply voltage supervision
Two comparators supervise the system supply VSYS. One is monitoring the undervoltage level
(VDD_FAULT_LOWER) and the other is indicating a good system supply (VDD_FAULT_UPPER).
The VDD_FAULT_LOWER threshold is OTP configurable and can be set via the VDD_FAULT_ADJ
control from 2.5 to 3.25 V in 50 mV steps. The VDD_FAULT_UPPER level is also OTP configurable
and can be set via the VDD_HYST_ADJ control from 100 to 450 mV higher than the
VDD_FAULT_LOWER threshold.
The high-to-low transition of the VDD_FAULT_UPPER signal asserts the event E_VDD_WARN. If
the event is not masked, this will issue an interrupt, which can be used by the host processor as an



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