REF

RE SE T GENE RA TOR

OS C

UVLO

TRIM

f ro m e na ble log ic

E N_BCK1

E N_BCK2

E N_BCK3

1 2V DC Sup ply

t o u C or DSP

f ro m e na ble log ic

f ro m e na ble log ic

nRST

VM ON1

B UCK 1

BS T1

LDRV

FB1

CM P1

VIN

PH2a

PH2b

FB2

CM P2

PH3a

PH3b

FB3

Vou t BUCK3

CM P3

INTE RNA L

VO LT AGE RA ILS

TS D

Vou t BUC K1

HDRV

1 2V

E NUS B1 /S CL

fro m uC o r DSP

E ENUS B2/ SDA

VREF1

VM ON2

I 2C

INT

to uC or DSP

F r om 3. 3v s up py

f ro m pos mo nit or Sup ply

VINB an d VINBQ p in s m u st b e t ied

t og th e r o n PC b o ar d

Op tion al

V 3p3

VLS D

I 2C_A DD

VREF2

fro m uC o r DSP

BS T3

BS T2

PH1

Vou t BUCK2

B UCK 3

VINB3

B UCK 2

VINB2

USB 1

US BO UT 1

US BF LG1/CTRL

V3p3

To USB p ort

T o/f rom u C o r DSP

USB 2

US BO UT 2

US BF LG2/nI NT

V3p3

To USB p ort

T o/f rom u C o r DSP

6V I 2C MODE

3. 3V UC MODE

TPS65230, TPS65231

interface is enabled and the device is controlled by writing to the control registers. Any fault or abnormal

operating condition is flagged by the interrupt pin. The interrupt is cleared by reading the status register via the

FUNCTIONAL BLOCK DIAGRAM

ORDERABLE PART NUMBER

TOP-SIDE MARKING

TPS65230A2DCAR

TPS65230

0°C to 85°C

48-pin (HTSSOP) - DCA

Reel of 2000

TPS65231A2DCAR

TPS65231

(1)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

(2)

Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.

2

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Product Folder Link(s): TPS65230 TPS65231

Not Recommended for New Designs