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TPS65231 Datasheet(PDF) 4 Page - Texas Instruments |
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TPS65231 Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 30 page ![]() BG VINBQ V6V VIN FB2 CMP2 EN_BCK2 PGND2 1 2 3 4 5 6 7 8 PGND2 PH2 PH2 VINB2 VINB2 BST2 DGND LDRV 9 10 11 12 13 14 15 16 HDRV PH1 BST1 EN_BCK1 CMP1 FB1 SS TRIP 17 18 19 20 21 22 23 24 I2C_ADD VMON2 VMON1 nBOR/nHOT USBFLG1/VCTRL USBOUT2 VINU USBOUT1 48 47 46 45 44 43 42 41 BST3 VINB3 VINB3 PH3 PH3 PGND3 USBFLG2/nINT PGND3 40 39 38 37 36 35 34 33 EN_BCK3 CMP3 FB3 EN_USB2/SDA EN_USB1/SCL nRST AGND V3P3 32 31 30 29 28 27 26 25 DCA HTSSOP PACKAGE (TOP VIEW) ABSOLUTE MAXIMUM RATINGS (1) (2) TPS65230, TPS65231 SLVSA10A – SEPTEMBER 2009 – REVISED SEPTEMBER 2009.................................................................................................................................... www.ti.com over operating free-air temperature range (unless otherwise noted) Input voltage range at VIN –0.3 to 25 V Input voltage range at VINB, VINBQ, VINU –0.3 to 7.0 V Voltage range at INT –0.3 to 7.0 V Voltage range at EN_BCK1, EN_BCK2, EN_BCK3, EN_USB1/SCL, EN_USB2/SDA, –0.3 to 3.6 V nRST, USBFLG1/VCTRL2, USBFLG2/VCTRL3 Voltage on HDRV, BST1 –0.3 to 31 V Voltage on PH1 –0.3 to 24 V Voltage on FB1, CMP1, FB2, CMP2, FB3, CMP3 –0.3 to 3.6 V Voltage on PH2, PH3, LDRV –0.3 to 7.0 V Voltage on BST2, BST3 –0.3 to 15V V Voltage on VMON1, VMON2, VMON3 –0.3 to 3.6 V Output Current BUCK2, BUCK3 3.8 A Peak output current Internally limited Human body model (HBM) 2 k ESD rating V Charged device model (CDM) 500 θ JA Thermal Resistance – Junction to ambient(3) 25 °C/W Continuous total power dissipation 55°C(3) no thermal warning 2.6 W TJ Operating virtual junction temperature range 0 to 150 °C TA Operating ambient temperature range 0 to 85 °C TSTG Storage temperature range –65 to 150 °C (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to network ground terminal. (3) Using JEDEC 51-5 (High K) board. This is based on standard 48DCA package, 4 layers, top/bottom layer: 2 oz Cu, inner layer: 1 oz Cu. Board size: 114.3 x 76.2 mm (4.5 x 3 inches), board thickness: 1.6 mm (0.0629 inch). 4 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPS65230 TPS65231 Not Recommended for New Designs |
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