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ML620Q136 Datasheet(PDF) 28 Page - LAPIS Semiconductor Co., Ltd. |
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ML620Q136 Datasheet(HTML) 28 Page - LAPIS Semiconductor Co., Ltd. |
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28 / 33 page ![]() FEDL620Q130-02 ML620Q131/2/3/4/5/6 28/33 Successive Approximation Type A/D Converter Parameter Symbol Condition Min. Typ. Max. Unit Resolution n ― ― ― 10 bits Integral non-linearity error INL 2.7V £ V DD £ 5.5V -4 ― +4 LSB 2.2V £ V DD < 2.7V -6 ― +6 1.8V £ V DD < 2.2V -10 ― +10 Differential non-linearity error DNL 2.7V £ V DD £ 5.5V -3 ― +3 2.2V £ V DD < 2.7V -5 ― +5 1.8V £ V DD < 2.2V -9 ― +9 Zero-scale error VOFF RI £ 5kΩ -6 ― +6 Full-scale error FSE RI £ 5kΩ -6 ― +6 Input impedance RI ― ― ― 5k Ω A/D operating voltage VDD ― 1.8 ― 5.5 V Conversion time tCONV CPU works in PLL oscillation mode SACK bit = 0 2.7V £ V DD £ 5.5V ― 13.67 ― μs CPU works in PLL oscillation mode SACK bit = 1 1.8V £ V DD £ 5.5V ― 41.26 ― Note: ML620Q131/ML620Q132/ML620Q133 do no have AIN7 and AIN6. A VDD VDDL VSS Analog input 2.2 μF - RI ≤5kΩ AIN0 to AIN7 0.1 μF + 2.2 μF |
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