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TAS6424 Datasheet(PDF) 39 Page - Texas Instruments |
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TAS6424 Datasheet(HTML) 39 Page - Texas Instruments |
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39 / 68 page ![]() 39 TAS6424-Q1 www.ti.com SLOS870A – SEPTEMBER 2016 – REVISED OCTOBER 2016 Product Folder Links: TAS6424-Q1 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 9.6.12 DC Load Diagnostics Report 3—Line Output—Register (address = 0x0E) [default = 0x00] The DC Load Diagnostic Report, Line Output, register is shown in Figure 58 and described in Table 21. Figure 58. DC Load Diagnostics Report 3—Line Output—Register 7 6 5 4 3 2 1 0 RESERVED CH1 LO LDG CH2 LO LDG CH3 LO LDG CH4 LO LDG R-0 R-0 R-0 R-0 Table 21. DC Load Diagnostics Report 3—Line Output—Field Descriptions Bit Field Type Reset Description 7–4 RESERVED 0 3 CH1 LO LDG R 0 0: No line output detected on channel 1 1: Line output detected on channel 1 2 CH2 LO LDG R 0 0: No line output detected on channel 2 1: Line output detected on channel 2 1 CH3 LO LDG R 0 0: No line output detected on channel 3 1: Line output detected on channel 3 0 CH4 LO LDG R 0 0: No line output detected on channel 4 1: Line output detected on channel 3 9.6.13 Channel State Reporting Register (address = 0x0F) [default = 0x55] The Channel State Reporting register is shown in Figure 59 and described in Table 22. Figure 59. Channel State-Reporting Register 7 6 5 4 3 2 1 0 CH1 STATE REPORT CH2 STATE REPORT CH3 STATE REPORT CH3 STATE REPORT R-01 R-01 R-01 R-01 Table 22. State-Reporting Field Descriptions Bit Field Type Reset Description 7–6 CH1 STATE REPORT R 01 00: PLAY 01: Hi-Z 10: MUTE 11: DC load diagnostics 5–4 CH2 STATE REPORT R 01 00: PLAY 01: Hi-Z 10: MUTE 11: DC load diagnostics 3–2 CH3 STATE REPORT R 01 00: PLAY 01: Hi-Z 10: MUTE 11: DC load diagnostics 1–0 CH4 STATE REPORT R 01 00: PLAY 01: Hi-Z 10: MUTE 11: DC load diagnostics |
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