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TAS6424 Datasheet(PDF) 13 Page - Texas Instruments |
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TAS6424 Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 68 page ![]() Total Output Power (W) 0 10 20 30 40 50 60 70 80 90 100 0 20 40 60 80 100 D020 PVDD = 14.4 V PVDD = 24 V Output Power (W) 0 10 20 30 40 50 60 70 80 90 0 20 40 60 80 100 120 D017 PVDD = 14.4 V PVDD = 24 V Supply Voltage (V) 0 20 40 60 80 100 120 140 20 5 15 25 10 20 D016 Gain Level 1 Gain Level 2 Gain Level 3 Gain Level 4 Output Power (W) 0 10 20 30 40 50 60 70 80 90 100 0 20 40 60 80 100 120 D019 PVDD = 14.4 V PVDD = 24 V Supply Voltage (V) 5 10 15 20 25 0 20 40 60 80 100 10 20 D014 2 : Load 4 : Load Supply Voltage (V) 0 20 40 60 80 100 120 140 20 5 15 25 10 20 D015 Gain Level 1 Gain Level 2 Gain Level 3 Gain Level 4 13 TAS6424-Q1 www.ti.com SLOS870A – SEPTEMBER 2016 – REVISED OCTOBER 2016 Product Folder Links: TAS6424-Q1 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Typical Characteristics (continued) TA = 25 ºC, VVDD = 3.3 V, VBAT = PVDD = 14.4 V, RL = 4 Ω, fIN = 1 kHz, fs = 48 kHz, fSW = 2.11 MHz, AES17 filter, default I 2C settings, see Figure 79 and Figure 82 (unless otherwise noted) 10% THD 2.11-MHz fSW Figure 13. Output Power vs Supply Voltage A-weighted Noise 384-kHz fSW Figure 14. Noise vs Supply Voltage A-weighted Noise 2.11-MHz fSW Figure 15. Noise vs Supply voltage 4 Ω 384-kHz fSW Figure 16. Power Efficiency vs Output Power 4 Ω 2.1-MHz fSW Figure 17. Power Efficiency vs Output Power 2 Ω 384-kHz fSW Figure 18. Power Efficiency vs Output Power |
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