MT9072AB datasheet(120/275 Pages) ZARLINK

120 / 275 page

MT9072

Data Sheet

120

Zarlink Semiconductor Inc.

Bit

Name

Functional Description

15-10

not used.

9CSIGEN

(0)

Common Channel Signaling Enable. Setting this bit enables common channel signaling in

conjunction with register Y0B. All other channels on the CSTo stream are tristate. Register

Y0B defines the map between CST and PCM stream.

RBEN

(0)

Robbed Bit Signaling Enable. Setting this bit multiplexes the AB or ABCD signaling bits

into bit position 8 of all DS0 channels every 6th frame. Signaling is only sent in channels for

which the CC bit in the per channel control word (Address Y90 - YA7) is set to 1.

not used

6RSDB

(0)

Receive Signaling Debounce. Setting this bit causes incoming signaling bits to be

debounced for a period of 6 to 9 milliseconds before reporting on CSTo streams or in the

Receive signaling Bits Registers..

5RFL

(0)

Receive Signaling Freeze Due to Loss. If one, the receive signaling is frozen if a receive

loss of signal is detected. The freeze is cleared upon clearance of Loss.

not used.

3-2

SM1-0

(00)

Signaling Message. These two bits are used to fill the vacant bit positions available on

CSTo when the MT9072 is operating on a D4 trunk. The first two bits of each reporting

nibble of CSTo contain the AB signaling bits. The last two will contain SM1 and SM0 (in that

order). When the MT9072 is connected to ESF trunks four signaling bits (ABCD) are

reported and the bits SM1-0 settings are ignored.

1-0

SIP1-0

Signaling Interrupt Period. These 2 bits determine the signaling Interrupt period due to the

Receive signaling changes. This 2 bits determine the duration of the signaling interrupt bit

CASRI(Y35).

00 2 Msec Period

01 8 Msec Period

10 16 Msec Period

Table 67 - Signaling Control Word (Y04) (T1)

MT9072AB Datasheet(PDF) 120 Page - Zarlink Semiconductor Inc

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