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MT9072AB Datasheet(PDF) 127 Page - Zarlink Semiconductor Inc |
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MT9072AB Datasheet(HTML) 127 Page - Zarlink Semiconductor Inc |
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127 / 275 page ![]() MT9072 Data Sheet 127 Zarlink Semiconductor Inc. 2LLDD (0) Line Loopback Disable Detect. This bit will be set when a framed or unframed repeating pattern of 001 has been detected during a 48 millisecond interval. Up to fifteen errors are permitted per integration period. Note that the code detected is dependent on Receive Loopback Deactivate Code Match (YF0). 1 T1DRR (0) T1DM Received R bit. This bit is used for AT&T 8 KB/s communications channel. This bit will be received in bit 1 of timeslot 24 of the receive PCM24 stream in T1DM mode. 0T1DRY T1DM Received Yellow Alarm. If this bit is 0 a T1DM yellow alarm has been detected in bit 2 of timeslot 24 of the receive PCM24 stream in T1DM mode. Bit Name Functional Description 15-3 # not used. 2 1SEC One Second Timer Status. This bit changes state once every 1 second. 1 2SEC Two Second Timer Status. This bit changes state once every 2 seconds and is synchronous with the 1 SEC timer. 0 # not used. Table 80 - Timer Status Word(Y11) (T1) Bit Name Functional Description 15-10 # not used. 9RxBOM Bit Oriented Message Received. This bit is set when a Received Bit Oriented Message is received. 8 RxBOMM Receive Bit Oriented Match. This bit is set if there is a match between the Received Bit Oriented Message and Receive Bit oriented Match register. 7 - 0 RxBOM7 - 0 Receive Bit Oriented Message. This is the bit oriented message received. This register is updated after 8 out of 10 messages are received. Table 81 - Receive Bit Oriented Message(Y12) (T1) Bit Name Functional Description Table 79 - Synchronization and Alarm Status Word(Y10) (T1) |
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