LM2597 datasheet(20/34 Pages) NSC

20 / 34 page

Typical Circuit and Layout

Guidelines (Continued)

As in any switching regulator, layout is very important. Rap-

idly switching currents associated with wiring inductance can

generate voltage transients which can cause problems. For

minimal inductance and ground loops, the wires indicated by

heavy lines should be wide printed circuit traces and

should be kept as short as possible. For best results,

external components should be located as close to the

switcher lC as possible using ground plane construction or

single point grounding.

If open core inductors are used, special care must be

taken as to the location and positioning of this type of induc-

tor. Allowing the inductor flux to intersect sensitive feedback,

lC groundpath and C

OUT wiring can cause problems.

When using the adjustable version, special care must be

taken as to the location of the feedback resistors and the

associated wiring. Physically locate both resistors near the

IC, and route the wiring away from the inductor, especially an

open core type of inductor. (See application section for more

information.)

Application Information

PIN FUNCTIONS

IN (Pin 7) — This is the positive input supply for the IC

switching regulator. A suitable input bypass capacitor must

be present at this pin to minimize voltage transients and to

supply the switching currents needed by the regulator.

Ground (Pin 6) — Circuit ground.

Output (Pin 8) — Internal switch. The voltage at this pin

switches between (+V

IN −VSAT) and approximately −0.5V,

with a duty cycle of V

OUT/VIN. To minimize coupling to sen-

sitive circuitry, the PC board copper area connected to this

pin should be kept to a minimum.

Feedback (Pin 4) — Senses the regulated output voltage to

complete the feedback loop.

Shutdown /Soft-start (Pin 5) — This dual function pin pro-

vides the following features: (a) Allows the switching regula-

tor circuit to be shut down using logic level signals thus

dropping the total input supply current to approximately

80 µA. (b) Adding a capacitor to this pin provides a soft-start

feature which minimizes startup current and provides a con-

trolled ramp up of the output voltage.

Error Flag (Pin 1) — Open collector output that provides a

low signal (flag transistor ON) when the regulated output

voltage drops more than 5% from the nominal output volt-

age. On start up, Error Flag is low until V

OUT reaches 95% of

the nominal output voltage and a delay time determined by

the Delay pin capacitor. This signal can be used as a reset to

a microprocessor on power-up.

Delay (Pin 2) — At power-up, this pin can be used to provide

a time delay between the time the regulated output voltage

reaches 95% of the nominal output voltage, and the time the

error flag output goes high.

Bias Supply (Pin 3) — This feature allows the regulators

internal circuitry to be powered from the regulated output

voltage or an external supply, instead of the input voltage.

This results in increased efficiency under some operating

conditions, such as low output current and/or high input

voltage.

Special Note If any of the above four features (Shutdown

/Soft-start, Error Flag, Delay, or Bias Supply) are not used,

the respective pins should be left open.

EXTERNAL COMPONENTS

SOFT-START CAPACITOR

SS — A capacitor on this pin provides the regulator with a

Soft-start feature (slow start-up). When the DC input voltage

is first applied to the regulator, or when the Shutdown

/Soft-start pin is allowed to go high, a constant current

(approximately 5 µA begins charging this capacitor). As the

capacitor voltage rises, the regulator goes through four op-

erating regions (See the bottom curve in

Figure 13).

1. Regulator in Shutdown. When the SD /SS pin voltage is

between 0V and 1.3V, the regulator is in shutdown, the

output voltage is zero, and the IC quiescent current is ap-

proximately 85 µA.

2. Regulator ON, but the output voltage is zero. With the

SD /SS pin voltage between approximately 1.3V and 1.8V,

the internal regulatory circuitry is operating, the quiescent

current rises to approximately 5 mA, but the output voltage is

still zero. Also, as the 1.3V threshold is exceeded, the

Soft-start capacitor charging current decreases from 5 µA

down to approximately 1.6 µA. This decreases the slope of

capacitor voltage ramp.

3. Soft-start Region. When the SD /SS pin voltage is be-

tween 1.8V and 2.8V (@ 25˚C), the regulator is in a Soft-start

condition. The switch (Pin 8) duty cycle initially starts out

very low, with narrow pulses and gradually get wider as the

capacitor SD /SS pin ramps up towards 2.8V. As the duty

cycle increases, the output voltage also increases at a con-

trolled ramp up. See the center curve in

Figure 13. The input

supply current requirement also starts out at a low level for

the narrow pulses and ramp up in a controlled manner. This

is a very useful feature in some switcher topologies that

require large startup currents (such as the inverting configu-

ration) which can load down the input power supply.

Note: The lower curve shown in

Figure 13 shows the Soft-start region from

0% to 100%. This is not the duty cycle percentage, but the output

voltage percentage. Also, the Soft-start voltage range has a negative

temperature coefficient associated with it. See the Soft-start curve in

the electrical characteristics section.

4. Normal operation. Above 2.8V, the circuit operates as a

standard Pulse Width Modulated switching regulator. The

capacitor will continue to charge up until it reaches the

internal clamp voltage of approximately 7V. If this pin is

driven from a voltage source, the current must be limited to

about 1 mA.

If the part is operated with an input voltage at or below the

internal soft-start clamp voltage of approximately 7V, the

voltage on the SD/SS pin tracks the input voltage and can be

disturbed by a step in the voltage. To maintain proper func-

tion under these conditions, it is strongly recommended that

the SD/SS pin be clamped externally between the 3V maxi-

mum soft-start threshold and the 4.5V minimum input volt-

age.

Figure 15 is an example of an external 3.7V (approx.)

clamp that prevents a line-step related glitch but does not

interfere with the soft-start behavior of the device.

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