LM2598 datasheet(20/33 Pages) NSC

20 / 33 page

Application Information (Continued)

the narrow pulses and ramp up in a controlled manner. This

is a very useful feature in some switcher topologies that

require large startup currents (such as the inverting configu-

ration) which can load down the input power supply.

Note: The lower curve shown in

Figure 13 shows the Soft-start region from

0% to 100%. This is not the duty cycle percentage, but the output

voltage percentage. Also, the Soft-start voltage range has a negative

temperature coefficient associated with it. See the Soft-start curve in

the electrical characteristics section.

4. Normal operation. Above 2.8V, the circuit operates as a

standard Pulse Width Modulated switching regulator. The

capacitor will continue to charge up until it reaches the

internal clamp voltage of approximately 7V. If this pin is

driven from a voltage source, the current must be limited to

about 1 mA.

If the part is operated with an input voltage at or below the

internal soft-start clamp voltage of approximately 7V, the

voltage on the SD/SS pin tracks the input voltage and can be

disturbed by a step in the voltage. To maintain proper func-

tion under these conditions, it is strongly recommended that

the SD/SS pin be clamped externally between the 3V maxi-

mum soft-start threshold and the 4.5V minimum input volt-

age.

Figure 15 is an example of an external 3.7V (approx.)

clamp that prevents a line-step related glitch but does not

interfere with the soft-start behavior of the device.

DS012593-30

FIGURE 13. Soft-start, Delay, Error, Output

DS012593-31

FIGURE 14. Timing Diagram for 5V Output

LM2598 Datasheet(PDF) 20 Page - National Semiconductor (TI)