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LM2655 Datasheet(PDF) 9 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Part # LM2655
Description  2.5A High Efficiency Synchronous Switching Regulator
PDF  16 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM2655 Datasheet(HTML) 9 Page - National Semiconductor (TI)

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Operation (Continued)
be use to maximize efficiency. When operating the LM2655
in asynchronous mode, the LDR pin should be terminated
with a large resistor (1 Meg
Ω), or left floating. Operation in
asynchronous mode is similar to that of synchronous mode,
except the internal low-side MOSFET logic is not used. At
the beginning of a switching cycle, the high-side MOSFET is
on and current from the input source flows through the induc-
tor and to the load. The current from the high-side MOSFET
is sensed and compared with the output of the error amplifier
(COMP pin). When the sensed current reaches the COMP
pin voltage level, the high-side switch is turned off. At this in-
stant, the load current is commutated through the catch di-
ode. The current now flows through the diode and the induc-
tor and on to the load. At the end of the switching cycle, the
high-side switch is turned on and the cycle is repeated.
Protections
The
peak
current
in
the
system
is
monitored
by
cycle-by-cycle current limit circuitry. This circuitry will turn the
high-side MOSFET off whenever the current through the
high-side MOSFET reaches a preset limit (see plots). A sec-
ond level current limit is accomplished by the undervoltage
protection: if the load pulls the output voltage down below
80% of its nominal value, the undervoltage latch protection
will wait for a period of time (set by the capacitor at the LDE-
LAY pin, see LDELAY CAPACITOR section for more infor-
mation). If the output voltage is still below 80% of its nominal
after the waiting period, the latch protection will be enabled.
In the latch protection mode, the low-side MOSFET is on and
the high-side MOSFET is off. The latch protection will also be
enabled immediately whenever the output voltage exceeds
the overvoltage threshold (110% of its nominal). Both protec-
tions are disabled during start-up.(See SOFT-START CA-
PACITOR section and LDELAY CAPACITOR section for
more information.) Toggling the input supply voltage or the
shutdown pin can reset the device from the latched protec-
tion mode.
DESIGN PROCEDURE
This section presents guidelines for selecting external com-
ponents.
INPUT CAPACITOR
A low ESR aluminum, tantalum, ceramic, or any other type of
capacitor is needed between the input pin and power
ground. This capacitor prevents large voltage transients from
appearing at the input. The capacitor is selected based on
the RMS current and voltage requirements. The RMS cur-
rent is given by:
The RMS current reaches its maximum (I
OUT/2)
when
V
IN equals 2VOUT. For an aluminum or ceramic capacitor,
the voltage rating should be at least 25% higher than the
maximum input voltage. If a tantalum capacitor is used, the
voltage rating required is about twice the maximum input
voltage. The tantalum capacitor should be surge current
tested by the manufacturer to prevent damage by the inrush
current. It is also recommended to put a small ceramic ca-
pacitor (0.1 µF) between the input pin and ground pin to re-
duce high frequency noise.
INDUCTOR
The most critical parameters for the inductor are the induc-
tance, peak current and the DC resistance. The inductance
is related to the peak-to-peak inductor ripple current, the in-
put and the output voltages:
A higher value of ripple current reduces inductance, but in-
creases the conductance loss, core loss, current stress for
the inductor and switch devices. It also requires a bigger out-
put capacitor for the same output voltage ripple requirement.
A reasonable value is setting the ripple current to be 30% of
the DC output current. Since the ripple current increases
with the input voltage, the maximum input voltage is always
used to determine the inductance. The DC resistance of the
inductor is a key parameter for the efficiency. Lower DC re-
sistance is available with a bigger winding area. A good
tradeoff between the efficiency and the core size is letting the
inductor copper loss equal 2% of the output power.
OUTPUT CAPACITOR
The selection of C
OUT is primarily determined by the maxi-
mum allowable output voltage ripple. The output ripple in the
constant frequency, PWM mode is approximated by:
The ESR term usually plays the dominant role in determining
the voltage ripple. A low ESR aluminum electrolytic or tanta-
lum capacitor (such as Nichicon PL series, Sanyo OS-CON,
Sprague 593D, 594D, AVX TPS, and CDE polymer alumi-
num) is recommended. An electrolytic capacitor is not rec-
ommended for temperatures below −25˚C since its ESR
rises dramatically at cold temperature. A tantalum capacitor
has a much better ESR specification at cold temperature and
is preferred for low temperature applications.
The output voltage ripple in constant frequency mode has to
be less than the sleep mode voltage hysteresis to avoid en-
tering the sleep mode at full load:
V
RIPPLE < 20mV * VOUT /VFB
www.national.com
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