8

Maxim Integrated Products, Inc.

VT1697SB

Theory of Operation

VOLTAGE REGULATION

Maxim smart slave ICs provide the control logic, drivers, mon-

itoring circuits and power semiconductors for a synchronous

buck converter with fault protection, status monitoring and

accurate lossless current sensing. Phases are controlled by

the Master IC independently by separate phase control sig-

nals.

Power Switch Control and Drivers

The smart slave ICs operate in conjunction with a Maxim

Master IC. The Master controller will configure the voltage

regulator based on its configuration resistors and the number

of phases populated. The smart slave device’s switching is

controlled by the proprietary command signals on the phase

control lines. The phase control signal has three defined

states: high, low and a "tri-state". "Tri-state" is used for phase

shedding and DCM modes. An external boost capacitor is

required to supply the voltage for the high-side switch driver.

VDD and VCC are brought out separately to allow separate

decoupling to improve noise immunity on the VDD rail.

Current Sense Output

The integrated lossless current sense (or “current reconstruc-

tion”) produces a precise ratiometric current sense signal for

both positive and negative currents which is sent to the mas-

ter as an analog current signal. This current sense technology

provides accurate current information over load and tempera-

ture that is not affected by tolerances of passive elements

such as the output inductor, resistors and capacitors.

Phase Configuration

The ability for the Master to dynamically disable and re-

enable a phase is an integral part of the Maxim Master/Slave

architecture. The Master sets the phase control signal to “tri-

state” to disable a phase. The same state is used to control

DCM operation. When using a coupled inductor, a proprietary

mode (Coupled Inductor Mode) may be set by the master and

communicated to the smart slave via the phase control signal

to minimize losses due to coupled currents in inactive phases.

PROTECTION CIRCUITS

Overcurrent Protection

The smart slave ICs incorporate instantaneous overcurrent

fault protection using the lossless current sense/reconstruc-

tion. This overcurrent protection is separate from the system

overcurrent protection, and is intended to operate only in

extreme fault conditions to protect the IC and other compo-

nents. The system overcurrent protection set by the master

should be set with sufficient margin below the individual

Slave’s threshold to ensure correct system operation.

For current sourcing operation, if the instantaneous current in

the top switch (based on the current sense/reconstruction cir-

cuit) exceeds the overcurrent protection value shown in the

Electrical Characteristics table, the slave will regulate the

period of the top-side switch so as to keep its peak current at

a safe level. The protection threshold has been set to ensure

that the IC's maximum allowable peak current is not exceeded

when using the recommended inductors. The sourcing cur-

rent limiting is not considered a hard fault condition for slave,

and therefore TS_FAULTB will not be asserted. Since clamp-

ing is based on instantaneous reconstructed current, the rip-

ple current must be considered when calculating the

maximum average current per slave. The maximum average

current before clamping can be calculated as shown in

Equation 1. Note that the clamping is based on reconstructed

current. Limits shown in the Electrical Characteristics table for

Clamp Level reflect expected variations in application condi-

tions and external component characteristics. Also note that

the master (i.e., system) overcurrent protection should be set

lower than the corresponding slaves' maximum operating cur-

rent as stated above.

Equation 1

For current sinking protection, if the negative overcurrent pro-

tection threshold is reached, the slave limits the current and

TS_FAULTB is not asserted.

The VT1697SB implements an additional OCP shutdown

level (beyond the clamp levels). If the current in the top switch

exceeds the OCP shutdown level (shown in the Electrical

Characteristics table), the IC is turned OFF and fault is

reported by asserting FAULTB pin. The slave is then latched

OFF until the power is cycled.

The smart slave ICs include undervoltage lockout circuits:

ation with separate bias rails for master and slaves, please

active at all times after the initial system start up. It is not

active during the initial system power on state (before regula-

tion is enabled) and is activated approximately 20µs after ini-

tial start up. If either of these UVLO circuits is tripped during

operation, the smart slave will stop switching and a fault sig-

nal (TS_FAULTB pulled LOW) will be sent to the master.

Maximum Average DC Slave Current

OCP

I

RIPPLE

2

-------------------

–

=

where,

OCP

= Peak OCP Clamp Level (A)

= Peak-to-Peak Inductor Ripple Current (A)