VT1697SB datasheet(3/13 Pages) MAXIM

3 / 13 page

Maxim Integrated Products, Inc.

VT1697SB

Electrical Characteristics

VDD = VCC = 1.71V - 1.98V, VDDH = 12V. The  symbol denotes specifications which apply over the following temperature

range: TJ = 0 to 125°C, otherwise specifications are for TJ = 25°C. The # symbol denotes specifications which apply over the

following temperature range: TJ = -25 to 125°C.

Symbol

Parameter

Conditions

Min

Typ

Max

Units

Supply Voltages , Supply Current

VDD, VCC

Bias Supply Voltage

1.71

1.98

VDDH

Power Train Input Voltage

8.5

12.0

14.0

ICC + IDD

1.8V Bias Supply Current

Shutdown (See Note 1)

0.5

µA

Inactive, No Switching (See Note 2)

3.2

5.0

Load = 0A, VOUT = 1.8V, Fsw = 1.5MHz

Load = 0A, VOUT = 1.8V, Fsw = 300KHz

Load = 0A, VOUT = 1.8V, Fsw = 600KHz

IDDH

12V Bias Supply Current

Shutdown (See Note 1)

1.3

µA

Inactive, No Switching (See Note 2)

6.5

µA

IRECON Specification

Current gain (IL to ISENSE)-70A < IL < 70A

95000

100000

105000

A/A

Temperature Sensor Specifications

TRANGE

Temperature Sensor Dynamic Range

150

°C

ATEMP

Temperature Sensor Gain

3.01

mV/°C

–

Temperature Sensor Voltage

TJ = 0°C

832

Protection Features

VDD_UVLO

VDD UVLO Threshold (Rising)

1.47

1.57

1.64

VDD UVLO Threshold (Falling)

1.41

1.5

1.58

VDDH_OVLO

VDDH OVLO Threshold (Rising)

15.48

16.41

VDDH OVLO Threshold (Falling)

14.95

15.5

15.81

VDDH_UVLO

VDDH UVLO Threshold (Rising)

4.05

4.27

4.40

VDDH UVLO Threshold (Falling)

3.90

4.09

4.25

VBST_UVLO

VBST UVLO Threshold (Rising)

Note 3

1.39

1.52

1.66

VBST UVLO Threshold (Falling)

Note 3

1.32

1.45

1.57

OCP

Peak Positive OCP Clamp Level

Peak Positive OCP Clamp Delay

Peak Positive OCP Shutdown Level

110

121

Peak Positive OCP Shutdown Delay

Peak Negative OCP Clamp Level

-79.1

-71.9

-64.7

Peak Negative OCP Delay

110

OTP

Overtemperature Shutdown

Rising Threshold

140

150

165

°C

PWM Input

VIH

Input Voltage, High State

VDD - 0.20

VIL

Input Voltage, Low State

0.20

–

Tristate Control Threshold (VIN Rising)

0.63

TS_FAULTB Input

VIH

TS_FAULTB Digital Threshold VIH

0.41

VIL

TS_FAULTB Digital Threshold VIL

0.17

Note 1:

TSENSE, PWM and ISENSE pins of the slave are pulled LOW by the master. The slave is in this state before master OE is enabled.

Note 2:

Inactive, no switching: PWM signal is tristated by the master. The slave is in this mode when the master sheds a phase (temporarily disabling this slave) to save

power at lighter loads.

Note 3:

VBST_UVLO is measured with respect to VX and not from ground.

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