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ISO7710FDW Datasheet(PDF) 15 Page - Texas Instruments |
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ISO7710FDW Datasheet(HTML) 15 Page - Texas Instruments |
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15 / 32 page ![]() IN OUT EN VCC1 CL See Note A S1 GND2 GND1 + ± VCM + ± VOH or VOL C = 0.1 µF ±1% C = 0.1 µF ±1% VCC1 Pass-fail criteria: The output must remain stable. Copyright © 2016, Texas Instruments Incorporated VI VCC IN OUT VO CL See Note A IN = 0 V (Devices without suffix F) IN = VCC (Devices with suffix F) VO VI VOL VOH VCC 0 V 1.7 V 50% tDO default high default low Copyright © 2016, Texas Instruments Incorporated See Note B V I 50 W IN V O Input Generator Note A C L OUT 50% 10% 90% V I V O t PLH t PHL 50% V CC1 0 V 50% t r t f V OH 50% V OL Note B Copyright © 2016, Texas Instruments Incorporated 15 ISO7710 www.ti.com SLLSER9A – NOVEMBER 2016 – REVISED DECEMBER 2016 Product Folder Links: ISO7710 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 7 Parameter Measurement Information A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle, tr ≤ 3 ns, tf ≤ 3ns, ZO = 50 Ω. At the input, 50 Ω resistor is required to terminate Input Generator signal. It is not needed in actual application. B. CL = 15 pF and includes instrumentation and fixture capacitance within ±20%. Figure 11. Switching Characteristics Test Circuit and Voltage Waveforms A. CL = 15 pF and includes instrumentation and fixture capacitance within ±20%. B. Power Supply Ramp Rate = 10 mV/ns Figure 12. Default Output Delay Time Test Circuit and Voltage Waveforms A. CL = 15 pF and includes instrumentation and fixture capacitance within ±20%. Figure 13. Common-Mode Transient Immunity Test Circuit |
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