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STM8AL3L8x Datasheet(PDF) 11 Page - STMicroelectronics |
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STM8AL3L8x Datasheet(HTML) 11 Page - STMicroelectronics |
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11 / 131 page ![]() DocID027179 Rev 6 11/131 STM8AL318x STM8AL3L8x Description 60 2 Description The high-density STM8AL3x8x ultra-low-power devices feature an enhanced STM8 CPU core providing increased processing power (up to 16 MIPS at 16 MHz) while maintaining the advantages of a CISC architecture with improved code density, a 24-bit linear addressing space and an optimized architecture for low-power operations. The family includes an integrated debug module with a hardware interface (SWIM) which allows non-intrusive in-application debugging and ultrafast Flash programming. All high-density STM8AL3x8x microcontrollers feature embedded data EEPROM and low- power low-voltage single-supply program Flash memory. The devices incorporate an extensive range of enhanced I/Os and peripherals, a 12-bit ADC, two DACs, two comparators, a real-time clock, 8x40 or 4x44-segment LCD, four 16-bit timers, one 8-bit timer, as well as standard communication interfaces such as two SPIs, an I2C interface, and three USARTs. One 8x40 or 4x44-segment LCD is available on the STM8AL3L8x devices. The modular design of the peripheral set allows the same peripherals to be found in different ST microcontroller families including 32-bit families. This makes any transition to a different family very easy, and simplified even more by the use of a common set of development tools. 2.1 STM8AL ultra-low-power 8-bit family benefits High-density STM8AL3x8x devices are part of the STM8AL automotive ultra-low-power 8-bit family providing the following benefits: • Integrated system – 64 Kbytes of high-density embedded Flash program memory – 2 Kbytes of data EEPROM – 4 Kbytes of RAM – Internal high-speed and low-power low speed RC. – Embedded reset • Ultra-low-power consumption – 1 µA in Active-halt mode – Clock gated system and optimized power management – Capability to execute from RAM for Low-power wait mode and Low-power run mode • Advanced features – Up to 16 MIPS at 16 MHz CPU clock frequency – Direct memory access (DMA) for memory-to-memory or peripheral-to-memory access. • Short development cycles – Application scalability across a common family product architecture with compatible pinout, memory map and modular peripherals. – Wide choice of development tools |
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