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STM8AL3L8x Datasheet(PDF) 24 Page - STMicroelectronics |
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STM8AL3L8x Datasheet(HTML) 24 Page - STMicroelectronics |
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24 / 131 page  Functional overview STM8AL318x STM8AL3L8x 24/131 DocID027179 Rev 6 3.16 Communication interfaces 3.16.1 SPI The serial peripheral interfaces (SPI1 and SPI2) provide half/ full duplex synchronous serial communication with external devices. • Maximum speed: 8 Mbit/s (fSYSCLK/2) both for master and slave • Full duplex synchronous transfers • Simplex synchronous transfers on 2 lines with a possible bidirectional data line • Master or slave operation - selectable by hardware or software • Hardware CRC calculation • Slave/master selection input pin Note: SPI1 and SPI2 can be served by the DMA1 Controller. 3.16.2 I2C The I2C bus interface (I2C1) provides multi-master capability, and controls all I²C bus- specific sequencing, protocol, arbitration and timing. • Master, slave and multi-master capability • Standard mode up to 100 kHz and fast speed modes up to 400 kHz. • 7-bit and 10-bit addressing modes. • SMBus 2.0 and PMBus support • Hardware CRC calculation Note: I2C1 can be served by the DMA1 Controller. 3.16.3 USART The USART interfaces (USART1, USART2 and USART3) allow full duplex, asynchronous communications with external devices requiring an industry standard NRZ asynchronous serial data format. It offers a very wide range of baud rates. • 1 Mbit/s full duplex SCI • SPI1 emulation • High precision baud rate generator • Smartcard emulation • IrDA SIR encoder decoder • Single wire half duplex mode Note: USART1, USART2 and USART3 can be served by the DMA1 Controller. USART interfaces are used to implement LIN slave communication, with LIN Break detection on the framing error flag (FE in USART_SR register) with a value of 0 in the USART data register (USART_DR). |
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