CMOS 2-WIRED SERIAL EEPROM

S-24C01A/02A/04A

8

Seiko Instruments Inc.

4. Acknowledgment

The unit of data transmission is 8 bits. By turning the SDA line "L," the slave device mounted on the

system bus which receives the data during the 9th clock cycle outputs the acknowledgment signal

verifying the data reception.

When the EEPROM is rewriting, the device does not output the acknowledgment signal.

5. Device Addressing

To perform data communications, the master device mounted on the system outputs the start condition

read/write instruction code onto the SDA bus.

Upper 4 bits of the device address are called the "Device Code," and set to "1010." Successive 3 bits are called the

"Slave Address." It is used to select a device on the system bus, and compared to the predetermined address value

at the address input pin (A2, A1, or A0).

When the comparison results match, the slave device outputs the acknowledgment signal during the 9th clock

In the S-24C04A, "A0" does not exist in the slave addresses. So, "A0" becomes "P0." "P0" is a page address bit and

is equivalent to an additional uppermost bit of the word address. Accordingly, when P0="0," the former half area

corresponding to 2 kbits (addresses from 000h to 0FFh) in the entire memory are selected; when P0="1," the latter

half area corresponding to 2 kbits (addresses from 100h to 1FFh) in all areas of the memory are selected.

Figure 8 Acknowledgment Output Timing

1

8

9

Acknow-

ledgment

Output

Start

Condition

SCL

(EEPROM Input)

SDA

(Master Output)

SDA

(EEPROM Output)

Figure 9 Device Address

Slave Address

1

0

1

0

A2

A1

A0

R/W

Device Code

S-24C01A

S-24C02A

MSB

LSB

1

0

1

0

A2

A1

A0

R/W

1

0

1

0

A2

A1

P0

R/W

S-24C04A

MSB

LSB

Device Code

Slave

Address

Page

Address