TLC34075 datasheet(28/52 Pages) TI

28 / 52 page

2–16

During special nibble mode, the input mux circuit latches all 8-bit inputs but only passes on the specified

nibble. The specified nibble is stored in the 4 LSBs of the next register pipe after the input latch, and the

4 MSBs are zeroed in that register. The register pipe contents are then passed to the read mask block. With

this structure, the palette page register still functions normally, providing good flexibility to users.

If the general control register bit 3 = 0 and bit 2 = 0, both split shift register transfers and special nibble mode

are disabled and the SFLAG/NFLAG input is ignored.

Sampled

LOAD

Input

SFLAG/NFLAG

of Pixel Data

Latch First Group

of Pixel Data

Latch Last Group

Valid

Don’t Care

Valid

(at its input pin)

Last Group of Pixel Data

SCLK

PIXEL DATA

BLANK

VCLK

†

‡

†

‡

CAUTION:

If the data is not held valid until SCLK and BLANK both go low, the last few pixels could be missed.

Setup time to next VCLK falling edge after BLANK high (must be met, otherwise the first pixel data

could be missed).

Group

2nd

Group

1st

Group

4th

Group

3rd

Group

5th

Figure 12. SFLAG/NFLAG Timing in Special Nibble Mode

2.10

MUXOUT Output

MUXOUT is a TTL-compatible output. It is software programmable and is used to control external devices.

Its typical application is to select the HSYNC and VSYNC inputs between the VGA pass-through mode and

the normal modes (see Section 2.8). This output is driven low at power-up or when VGA pass-through mode

is selected; at any other time it can be programmed to the desired polarity via general control register bit

2.11

General Control Register

The general control register is used to control HSYNC and VSYNC polarity, split shift register transfer

enabling, special nibble mode, sync control, the ones accumulation clock source, and the VGA

pass-through indicator. The bit field definitions are as follows:

TLC34075 Datasheet(PDF) 28 Page - Texas Instruments

TLC34075 Datasheet(HTML) 28 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

Datasheet Download

Link URL