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LM4867 Datasheet(PDF) 12 Page - National Semiconductor (TI) |
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LM4867 Datasheet(HTML) 12 Page - National Semiconductor (TI) |
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12 / 26 page ![]() Application Information (Continued) The MTE and LQ packages must have their DAPs soldered to a copper pad on the PCB. The DAP’s PCB copper pad is then, ideally, connected to a large plane of continuous un- broken copper. This plane forms a thermal mass, heat sink, and radiation area. Place the heat sink area on either outside plane in the case of a two-sided or multi-layer PCB. (The heat sink area can also be placed on an inner layer of a multi-layer board. The thermal resistance, however, will be higher.) Connect the DAP copper pad to the inner layer or backside copper heat sink area with 32 (4 X 8) (MTE) or 6 (3 X 2) (LQ) vias. The via diameter should be 0.012in - 0.013in with a 1.27mm pitch. Ensure efficient thermal conductivity by plugging and tenting the vias with plating and solder mask, respectively. Best thermal performance is achieved with the largest prac- tical copper heat sink area. If the heatsink and amplifier share the same PCB layer, a nominal 2.5in2 (min) area is necessary for 5V operation with a 4 Ω load. Heatsink areas not placed on the same PCB layer as the LM4867 should be 5in 2 (min) for the same supply voltage and load resistance. The last two area recommendations apply for 25˚C ambient temperature. Increase the area to compensate for ambient temperatures above 25˚C. In systems using cooling fans, the LM4867MTE can take advantage of forced air cooling. With an air flow rate of 450 linear-feet per minute and a 2.5in 2 exposed copper or 5.0in 2 inner layer copper plane heatsink, the LM4867MTE can continuously drive a 3 Ω load to full power. The LM4867LQ achieves the same output power level without forced-air cooling. In all circumstances and under all conditions, the junction temperature must be held below 150˚C to prevent activating the LM4867’s thermal shutdown protection. The LM4867’s power de-rating curve in the Typical Performance Characteristics shows the maxi- mum power dissipation versus temperature. Example PCB layouts for the exposed-DAP TSSOP and LQ packages are shown in the Demonstration Board Layout section. Further detailed and specific information concerning PCB layout and fabrication and mounting an LQ (LLP) is found in National Semiconductor’s AN1187. PCB LAYOUT AND SUPPLY REGULATION CONSIDERATIONS FOR DRIVING 3 Ω AND 4Ω LOADS Power dissipated by a load is a function of the voltage swing across the load and the load’s impedance. As load imped- ance decreases, load dissipation becomes increasingly de- pendent on the interconnect (PCB trace and wire) resistance between the amplifier output pins and the load’s connec- tions. Residual trace resistance causes a voltage drop, which results in power dissipated in the trace and not in the load as desired. For example, 0.1 Ω trace resistance reduces the output power dissipated by a 4 Ω load from 2.1W to 2.0W. The problem of decreased load dissipation is exacerbated as load impedance decreases. Therefore, to maintain the highest load dissipation and widest output voltage swing, PCB traces that connect the output pins to a load must be as wide as possible. Poor power supply regulation adversely affects maximum output power. A poorly regulated supply’s output voltage decreases with increasing load current. Reduced supply voltage causes decreased headroom, output signal clipping, and reduced output power. Even with tightly regulated sup- plies, trace resistance creates the same effects as poor supply regulation. Therefore, making the power supply traces as wide as possible helps maintain full output voltage swing. BRIDGE CONFIGURATION EXPLANATION As shown in Figure 4, the LM4867 consists of two pairs of operational amplifiers, forming a two-channel (channel A and channel B) stereo amplifier. (Though the following discusses channel A, it applies equally to channel B.) External resistors R f and Ri set the closed-loop gain of Amp1A, whereas two internal 20k Ω resistors set Amp2A’s gain at -1. The LM4867 drives a load, such as a speaker, connected between the two amplifier outputs, -OUTA and +OUTA. Figure 4 shows that Amp1A’s output serves as Amp2A’s input. This results in both amplifiers producing signals iden- tical in magnitude, but 180˚ out of phase. Taking advantage of this phase difference, a load is placed between -OUTA and +OUTA and driven differentially (’commonly referred to as bridge mode’). This results in a differential gain of A VD =2 * (Rf/R i) (1) Bridge mode amplifiers are different from single-ended am- plifiers that drive loads connected between a single amplifi- er’s output and ground. For a given supply voltage, bridge mode has a distinct advantage over the single-ended con- figuration: its differential output doubles the voltage swing across the load. This produces four times the output power when compared to a single-ended amplifier under the same conditions. This increase in attainable output power as- sumes that the amplifier is not current limited or that the output signal is not clipped. To ensure minimum output sig- nal clipping when choosing an amplifier’s closed-loop gain, refer to the Audio Power Amplifier Design section. A bridge amplifier design has a few distinct advantages over the single-ended configuration, as it provides differential drive to the load, thus doubling the output swing for a speci- fied supply voltage. Four times the output power is possible as compared to a single-ended amplifier under the same conditions. This increase in attainable output power as- sumes that the amplifier is not current limited or clipped. In order to choose an amplifier’s closed-loop gain without caus- ing excessive clipping, please refer to the Audio Power Amplifier Design section. Another advantage of the differential bridge output is no net DC voltage across the load. This is accomplished by biasing channel A’s and channel B’s outputs at half-supply. This eliminates the coupling capacitor that single supply, single-ended amplifiers require. Eliminating an output cou- pling capacitor in a single-ended configuration forces a single-supply amplifier’s half-supply bias voltage across the load. This increases internal IC power dissipation and may permanently damage loads such as speakers. POWER DISSIPATION Power dissipation is a major concern when designing a successful single-ended or bridged amplifier. Equation (2) states the maximum power dissipation point for a single-ended amplifier operating at a given supply voltage and driving a specified output load. P DMAX =(VDD) 2/(2 π2R L): Single-Ended (2) However, a direct consequence of the increased power de- livered to the load by a bridge amplifier is higher internal power dissipation for the same conditions. The LM4867 has two operational amplifiers per channel. The maximum internal power dissipation per channel operating in www.national.com 12 |
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